Searched refs:CACHE_UPDATE_MODE (Results 1 - 10 of 10) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | rv770.c | 914 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_enable()
960 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_disable()
991 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_agp_enable()
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| H A D | rv770d.h | 652 #define CACHE_UPDATE_MODE(x) ((x) << 6) macro
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| H A D | nid.h | 122 #define CACHE_UPDATE_MODE(x) ((x) << 6) macro
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| H A D | evergreen.c | 2414 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_enable()
2467 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_disable()
2497 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_agp_enable()
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| H A D | evergreend.h | 1160 #define CACHE_UPDATE_MODE(x) ((x) << 6) macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | rv770.c | 911 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_enable()
957 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_disable()
988 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_agp_enable()
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| H A D | rv770d.h | 652 #define CACHE_UPDATE_MODE(x) ((x) << 6) macro
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| H A D | nid.h | 122 #define CACHE_UPDATE_MODE(x) ((x) << 6) macro
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| H A D | evergreen.c | 2416 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_enable()
2469 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_disable()
2499 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_agp_enable()
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| H A D | evergreend.h | 1160 #define CACHE_UPDATE_MODE(x) ((x) << 6) macro
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