Searched refs:CACHE_MODE_0 (Results 1 - 7 of 7) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| H A D | intel_workarounds.c | 275 /* From the Haswell PRM, Command Reference: Registers, CACHE_MODE_0: in gen8_ctx_workarounds_init()
768 wa_masked_dis(wal, CACHE_MODE_0, RC_OP_FLUSH_ENABLE); in gen4_gt_workarounds_init()
777 wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE); in g4x_gt_workarounds_init()
797 wa_masked_dis(wal, CACHE_MODE_0, RC_OP_FLUSH_ENABLE); in snb_gt_workarounds_init()
812 wa_masked_dis(wal, CACHE_MODE_0, CM0_STC_EVICT_DISABLE_LRA_SNB); in snb_gt_workarounds_init()
1934 CACHE_MODE_0, in rcs_engine_wa_init()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| H A D | intel_workarounds.c | 372 /* From the Haswell PRM, Command Reference: Registers, CACHE_MODE_0: in gen8_ctx_workarounds_init()
1046 wa_masked_dis(wal, CACHE_MODE_0, RC_OP_FLUSH_ENABLE); in gen4_gt_workarounds_init()
1055 wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE); in g4x_gt_workarounds_init()
2906 wa_masked_dis(wal, CACHE_MODE_0, RC_OP_FLUSH_ENABLE); in rcs_engine_wa_init()
2915 CACHE_MODE_0, in rcs_engine_wa_init()
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| H A D | intel_gt_regs.h | 193 #define CACHE_MODE_0 _MMIO(0x2120) /* 915+ only */ macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 94 MMIO_D(CACHE_MODE_0); in iterate_generic_mmio()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 2244 MMIO_DFH(CACHE_MODE_0, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 2000 MMIO_DFH(CACHE_MODE_0, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 3008 #define CACHE_MODE_0 _MMIO(0x2120) /* 915+ only */ macro
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