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Searched refs:CACHESIZE (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mm/
H A Dproc-xscale.S44 #define CACHESIZE 32768 define
54 * This must be aligned on a 2*CACHESIZE boundary. The code selects one of
88 eor \rd, \rd, #CACHESIZE
90 add \rs, \rd, #CACHESIZE
H A Dproc-xsc3.S48 #define CACHESIZE 32768 define
/kernel/linux/linux-6.6/arch/arm/mm/
H A Dproc-xscale.S44 #define CACHESIZE 32768 define
54 * This must be aligned on a 2*CACHESIZE boundary. The code selects one of
88 eor \rd, \rd, #CACHESIZE
90 add \rs, \rd, #CACHESIZE
H A Dproc-xsc3.S48 #define CACHESIZE 32768 define
/kernel/linux/linux-5.10/drivers/scsi/aic7xxx/
H A Daic79xx_pci.c241 #define CACHESIZE 0x000000fful macro
359 /*bytes*/1) & CACHESIZE; in ahd_pci_config()
H A Daic7xxx_pci.c586 #define CACHESIZE 0x0000003ful /* only 5 bits */ macro
844 /*bytes*/1) & CACHESIZE; in ahc_pci_config()
/kernel/linux/linux-6.6/drivers/scsi/aic7xxx/
H A Daic79xx_pci.c241 #define CACHESIZE 0x000000fful macro
359 /*bytes*/1) & CACHESIZE; in ahd_pci_config()
H A Daic7xxx_pci.c586 #define CACHESIZE 0x0000003ful /* only 5 bits */ macro
844 /*bytes*/1) & CACHESIZE; in ahc_pci_config()

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