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Searched refs:BL (Results 1 - 25 of 30) sorted by relevance

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/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh3/
H A Dswsusp.S59 ! BL=0: R7->R0 is bank0
65 ! BL=1: R7->R0 is bank1
80 ! BL=0: R7->R0 is bank0
105 ! BL=0: R7->R0 is bank0
112 ! BL=1: R7->R0 is bank1
119 ! BL=0: R7->R0 is bank0
H A Dentry.S216 ! BL=0 on entry, on exit BL=1 (depending on r8).
388 ! BL=1 on entry, on exit BL=0.
504 1: .long 0xcfffffff ! RB=0, BL=0
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh3/
H A Dswsusp.S59 ! BL=0: R7->R0 is bank0
65 ! BL=1: R7->R0 is bank1
80 ! BL=0: R7->R0 is bank0
105 ! BL=0: R7->R0 is bank0
112 ! BL=1: R7->R0 is bank1
119 ! BL=0: R7->R0 is bank0
H A Dentry.S215 ! BL=0 on entry, on exit BL=1 (depending on r8).
387 ! BL=1 on entry, on exit BL=0.
503 1: .long 0xcfffffff ! RB=0, BL=0
/kernel/liteos_m/arch/arm/arm9/gcc/
H A Dlos_dispatch.S170 BL OsTaskEntry
178 BL OsTaskEntry
H A Dreset_vector.S107 BL OsBssInit
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
H A Dlos_dispatch.S164 BL HalSecureContextSave /* Store the secure context to g_secureContext->curStackPointer. */
199 BL HalSecureContextLoad /* Restore the secure context. */
267 BL HalSecureSVCHandler
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
H A Dlos_dispatch.S150 BL HalSecureContextSave /* Store the secure context to g_secureContext->curStackPointer. */
185 BL HalSecureContextLoad /* Restore the secure context. */
233 BL HalSecureSVCHandler
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
H A Dlos_dispatch.S164 BL HalSecureContextSave /* Store the secure context to g_secureContext->curStackPointer. */
199 BL HalSecureContextLoad /* Restore the secure context. */
267 BL HalSecureSVCHandler
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
H A Dlos_dispatch.S150 BL HalSecureContextSave /* Store the secure context to g_secureContext->curStackPointer. */
185 BL HalSecureContextLoad /* Restore the secure context. */
233 BL HalSecureSVCHandler
/kernel/liteos_a/arch/arm/arm/src/
H A Dlos_dispatch.S127 BL OsSchedToUserReleaseLock
154 BL OsPerfSetIrqRegs
H A Dlos_hw_exc.S122 BL \fun
162 BL OsRandomStackGuard
/kernel/linux/linux-5.10/arch/sh/kernel/
H A Dhead_32.S59 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
340 1: .long 0x500080F0 ! MD=1, RB=0, BL=1, FD=1, IMASK=0xF
/kernel/linux/linux-6.6/arch/sh/kernel/
H A Dhead_32.S59 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
340 1: .long 0x500080F0 ! MD=1, RB=0, BL=1, FD=1, IMASK=0xF
/kernel/linux/linux-5.10/arch/parisc/kernel/
H A Dentry.S756 BL schedule_tail, %r2
901 BL do_notify_resume,%r2
993 BL preempt_schedule_irq, %r2
1351 BL get_register,%r25
1355 BL get_register,%r25
1358 BL set_register,%r25
1387 BL get_register,%r25 /* Find the target register */
1390 BL set_register,%r25
1735 BL schedule_tail, %r2
1755 BL sys_rt_sigretur
[all...]
H A Dsyscall.S394 BL do_syscall_trace_exit,%r2
415 BL do_syscall_trace_exit,%r2
/kernel/liteos_m/arch/arm/cortex-m3/keil/
H A Dlos_startup.s60 BL LOS_HardBootInit
H A Dlos_dispatch.S108 BL OsSchedTaskSwitch
/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
H A Dprt_vector.S149 BL OsFpuInit
/kernel/linux/linux-5.10/arch/parisc/include/asm/
H A Dassembly.h49 #define BL b,l macro
57 #define BL bl macro
/kernel/linux/linux-6.6/arch/parisc/kernel/
H A Dentry.S738 BL schedule_tail, %r2
881 BL do_notify_resume,%r2
973 BL preempt_schedule_irq, %r2
1662 BL schedule_tail, %r2
1682 BL sys_rt_sigreturn,%r2
1685 BL sys_rt_sigreturn,%r2
1749 BL do_notify_resume,%r2
/kernel/linux/linux-6.6/arch/parisc/include/asm/
H A Dassembly.h34 #define BL b,l macro
42 #define BL bl macro
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2a/
H A Dentry.S196 ldc r0,sr ! all interrupt block (same BL = 1)
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh2a/
H A Dentry.S196 ldc r0,sr ! all interrupt block (same BL = 1)
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
H A Dlos_exc.S166 BL OsSyscallHandle

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