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Searched refs:BIT13 (Results 1 - 25 of 36) sorted by relevance

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/kernel/linux/linux-5.10/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h143 #define RCR_RXFTH BIT13
215 #define IMR_BcnInt BIT13
244 #define TPPoll_StopMgt BIT13
374 #define RRSR_MCS1 BIT13
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h44 #define BIT13 0x00002000 macro
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h44 #define BIT13 0x00002000 macro
/kernel/linux/linux-5.10/drivers/tty/
H A Dsynclink.c558 #define MISCSTATUS_TXC_LATCHED BIT13
579 #define SICR_TXC_ACTIVE BIT13
581 #define SICR_TXC (BIT13|BIT12)
1174 info->cmr_value &= ~BIT13; in mgsl_isr_receive_status()
1843 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12)); in shutdown()
4529 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12)); in usc_set_sdlc_mode()
4558 RegValue |= BIT13; in usc_set_sdlc_mode()
4593 case HDLC_ENCODING_NRZB: RegValue |= BIT13; break; in usc_set_sdlc_mode()
4595 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break; in usc_set_sdlc_mode()
4597 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 | BIT13; brea in usc_set_sdlc_mode()
[all...]
H A Dsynclink_gt.c386 #define IRQ_TXDATA BIT13
4212 val |= BIT15 + BIT13; in sync_mode()
4214 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4216 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
4287 val |= BIT15 + BIT13; in sync_mode()
4289 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4291 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/
H A Dhal_com_reg.h621 #define RRSR_MCS1 BIT13
791 #define IMR_BcnInt BIT13 /* Beacon DMA Interrupt 0 */
839 #define PHIMR_ATIMEND_E BIT13
890 /* RSVD BIT13 */
915 #define UHIMR_ATIMEND_E BIT13
974 #define IMR_ATIMEND_E_88E BIT13 /* ATIM Window End Extension for Win7 */
1038 #define RCR_AMF BIT13 /* Accept management type frame */
H A Drtl8723b_spec.h243 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
H A Dosdep_service.h34 #define BIT13 0x00002000 macro
/kernel/linux/linux-5.10/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h23 #define BIT13 0x00002000 macro
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
H A Dodm_debug.h74 #define ODM_COMP_RXHP BIT13
H A DHal8723BReg.h425 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
/kernel/linux/linux-6.6/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h23 #define BIT13 0x00002000 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/include/
H A Dosdep_service.h30 #define BIT13 0x00002000 macro
H A Drtl8723b_spec.h231 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
H A Dhal_com_reg.h560 #define RRSR_MCS1 BIT13
702 #define IMR_BcnInt BIT13 /* Beacon DMA Interrupt 0 */
749 #define RCR_AMF BIT13 /* Accept management type frame */
/kernel/linux/linux-5.10/include/uapi/linux/
H A Dsynclink.h32 #define BIT13 0x2000 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h109 #define IMR_BcnInt BIT13
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dsynclink.h32 #define BIT13 0x2000 macro
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
H A Dsynclink.h36 #define BIT13 0x2000 macro
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
H A Dsynclink.h23 #define BIT13 0x2000 macro
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
H A Dsynclink.h36 #define BIT13 0x2000 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h420 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
/kernel/linux/linux-6.6/drivers/scsi/
H A Ddc395x.h63 #define BIT13 0x00002000 macro
/kernel/linux/linux-5.10/drivers/scsi/
H A Ddc395x.h63 #define BIT13 0x00002000 macro
/kernel/linux/linux-6.6/drivers/tty/
H A Dsynclink_gt.c381 #define IRQ_TXDATA BIT13
4172 val |= BIT15 + BIT13; in sync_mode()
4174 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4176 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
4247 val |= BIT15 + BIT13; in sync_mode()
4249 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4251 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()

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