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Searched refs:BASE (Results 1 - 25 of 132) sorted by relevance

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/kernel/linux/linux-6.6/tools/testing/selftests/net/
H A Dudpgro_fwd.sh7 readonly BASE="ns-$(mktemp -u XXXXXX)"
11 readonly NS_SRC=$BASE$SRC
12 readonly NS_DST=$BASE$DST
51 ip link set dev veth$ns netns $BASE$ns
52 ip -n $BASE$ns link set dev veth$ns up
53 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V4$ns/24
54 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V6$ns/64 nodad
80 create_vxlan_endpoint $BASE$ns veth$ns $BM_NET_V4$((3 - $ns)) vxlan$ns 4
81 ip -n $BASE$ns addr add dev vxlan$ns $OL_NET_V4$ns/24
84 create_vxlan_endpoint $BASE
[all...]
H A Dveth.sh6 readonly BASE=`basename $STATS`
10 readonly NS_SRC=$BASE$SRC
11 readonly NS_DST=$BASE$DST
45 ip link set dev veth$ns netns $BASE$ns up
46 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V4$ns/24
47 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V6$ns/64 nodad
49 echo "#kernel" > $BASE
50 chmod go-rw $BASE
59 local flag=`ip netns exec $BASE$target ethtool -k veth$target |\
87 local cur_rx=`ip netns exec $BASE
[all...]
/kernel/linux/linux-5.10/drivers/media/pci/cobalt/
H A Dcobalt-omnitek.c42 #define BASE (cobalt->bar0) macro
43 #define CAPABILITY_HEADER (BASE)
44 #define CAPABILITY_REGISTER (BASE + 0x04)
47 #define INTERRUPT_STATUS (BASE + 0x08)
48 #define PCI(c) (BASE + 0x40 + ((c) * 0x40))
49 #define SIZE(c) (BASE + 0x58 + ((c) * 0x40))
50 #define DESCRIPTOR(c) (BASE + 0x50 + ((c) * 0x40))
51 #define CS_REG(c) (BASE + 0x60 + ((c) * 0x40))
52 #define BYTES_TRANSFERRED(c) (BASE + 0x64 + ((c) * 0x40))
/kernel/linux/linux-6.6/drivers/media/pci/cobalt/
H A Dcobalt-omnitek.c42 #define BASE (cobalt->bar0) macro
43 #define CAPABILITY_HEADER (BASE)
44 #define CAPABILITY_REGISTER (BASE + 0x04)
47 #define INTERRUPT_STATUS (BASE + 0x08)
48 #define PCI(c) (BASE + 0x40 + ((c) * 0x40))
49 #define SIZE(c) (BASE + 0x58 + ((c) * 0x40))
50 #define DESCRIPTOR(c) (BASE + 0x50 + ((c) * 0x40))
51 #define CS_REG(c) (BASE + 0x60 + ((c) * 0x40))
52 #define BYTES_TRANSFERRED(c) (BASE + 0x64 + ((c) * 0x40))
/kernel/linux/linux-5.10/fs/xfs/libxfs/
H A Dxfs_da_btree.h157 #define XFS_DA_LOGOFF(BASE, ADDR) ((char *)(ADDR) - (char *)(BASE))
158 #define XFS_DA_LOGRANGE(BASE, ADDR, SIZE) \
159 (uint)(XFS_DA_LOGOFF(BASE, ADDR)), \
160 (uint)(XFS_DA_LOGOFF(BASE, ADDR)+(SIZE)-1)
/kernel/linux/linux-6.6/fs/xfs/libxfs/
H A Dxfs_da_btree.h163 #define XFS_DA_LOGOFF(BASE, ADDR) ((char *)(ADDR) - (char *)(BASE))
164 #define XFS_DA_LOGRANGE(BASE, ADDR, SIZE) \
165 (uint)(XFS_DA_LOGOFF(BASE, ADDR)), \
166 (uint)(XFS_DA_LOGOFF(BASE, ADDR)+(SIZE)-1)
/kernel/linux/linux-5.10/include/linux/
H A Dzutil.h53 #define BASE 65521L /* largest prime smaller than 65536 */ macro
55 /* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
100 s1 %= BASE; in zlib_adler32()
101 s2 %= BASE; in zlib_adler32()
/kernel/linux/linux-6.6/include/linux/
H A Dzutil.h53 #define BASE 65521L /* largest prime smaller than 65536 */ macro
55 /* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
100 s1 %= BASE; in zlib_adler32()
101 s2 %= BASE; in zlib_adler32()
/kernel/linux/linux-6.6/tools/testing/selftests/gpio/
H A Dgpio-mockup.sh9 BASE=${0%/*}
106 $BASE/gpio-mockup-cdev $cdev_opts /dev/$chip $offset
150 $BASE/gpio-mockup-cdev $cdev_opts -s$val /dev/$chip $offset &
158 $BASE/gpio-mockup-cdev $cdev_opts /dev/$chip $offset || true
343 source $BASE/gpio-mockup-sysfs.sh
/kernel/linux/linux-6.6/tools/perf/tests/shell/
H A Ddaemon.sh168 base=BASE
177 sed -i -e "s|BASE|${base}|" ${config}
223 base=BASE
232 sed -i -e "s|BASE|${base}|" ${config}
250 base=BASE
261 sed -i -e "s|BASE|${base}|" ${config_new}
285 base=BASE
289 sed -i -e "s|BASE|${base}|" ${config_empty}
348 base=BASE
357 sed -i -e "s|BASE|
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c57 #define BASE(seg) \ macro
61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c57 #define BASE(seg) \ macro
61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-5.10/arch/sparc/net/
H A Dbpf_jit_comp_32.c181 #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \
184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
187 #define emit_load32(BASE, STRUCT, FIELD, DEST) \
190 *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \
193 #define emit_load16(BASE, STRUCT, FIELD, DEST) \
196 *prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST); \
199 #define __emit_load8(BASE, STRUCT, FIELD, DEST) \
201 *prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST); \
204 #define emit_load8(BASE, STRUCT, FIELD, DEST) \
206 __emit_load8(BASE, STRUC
[all...]
/kernel/linux/linux-6.6/arch/sparc/net/
H A Dbpf_jit_comp_32.c181 #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \
184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
187 #define emit_load32(BASE, STRUCT, FIELD, DEST) \
190 *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \
193 #define emit_load16(BASE, STRUCT, FIELD, DEST) \
196 *prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST); \
199 #define __emit_load8(BASE, STRUCT, FIELD, DEST) \
201 *prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST); \
204 #define emit_load8(BASE, STRUCT, FIELD, DEST) \
206 __emit_load8(BASE, STRUC
[all...]
/kernel/linux/linux-5.10/drivers/media/tuners/
H A Dtuner-xc2028-types.h13 /* BASE firmware should be loaded before any other firmware */
14 #define BASE (1<<0) macro
15 #define BASE_TYPES (BASE|F8MHZ|MTS|FM|INPUT1|INPUT2|INIT1)
17 /* F8MHZ marks BASE firmwares for 8 MHz Bandwidth */
47 /* There's a FM | BASE firmware + FM specific firmware (std=0) */
/kernel/linux/linux-6.6/drivers/media/tuners/
H A Dxc2028-types.h13 /* BASE firmware should be loaded before any other firmware */
14 #define BASE (1<<0) macro
15 #define BASE_TYPES (BASE|F8MHZ|MTS|FM|INPUT1|INPUT2|INIT1)
17 /* F8MHZ marks BASE firmwares for 8 MHz Bandwidth */
47 /* There's a FM | BASE firmware + FM specific firmware (std=0) */
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c54 #define BASE(seg) \ macro
58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
61 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c63 #define BASE(seg) BASE_INNER(seg) macro
68 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
74 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c55 #define BASE(seg) BASE_INNER(seg) macro
60 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
66 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c53 #define BASE(seg) BASE_INNER(seg) macro
58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c59 #define BASE(seg) BASE_INNER(seg) macro
64 BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
70 BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c62 #define BASE(seg) BASE_INNER(seg) macro
67 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
73 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c53 #define BASE(seg) BASE_INNER(seg) macro
58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c55 #define BASE(seg) BASE_INNER(seg) macro
60 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
66 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c54 #define BASE(seg) \ macro
58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
61 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

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