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Searched refs:AUX_SW_STATUS (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_aux.h40 SRI(AUX_SW_STATUS, DP_AUX, id)
48 SRI(AUX_SW_STATUS, DP_AUX, id), \
59 uint32_t AUX_SW_STATUS; member
104 AUX_SF(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, mask_sh),\
105 AUX_SF(AUX_SW_STATUS, AUX_SW_DONE, mask_sh),\
129 AUX_SF(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, mask_sh),\
130 AUX_SF(AUX_SW_STATUS, AUX_SW_DONE, mask_sh),\
227 * the AUX_SW_STATUS.AUX_SW_DONE bit.
230 * During normal operation, AUX_SW_STATUS.AUX_SW_DONE bit is set
H A Ddce_aux.c214 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0, in submit_channel_request()
282 *sw_status = REG_GET(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, in read_channel_reply()
343 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1, in get_channel_status()
346 value = REG_READ(AUX_SW_STATUS); in get_channel_status()
372 AUX_SW_STATUS, in get_channel_status()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_aux.h41 SRI(AUX_SW_STATUS, DP_AUX, id)
49 SRI(AUX_SW_STATUS, DP_AUX, id), \
60 uint32_t AUX_SW_STATUS; member
105 AUX_SF(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, mask_sh),\
106 AUX_SF(AUX_SW_STATUS, AUX_SW_DONE, mask_sh),\
129 AUX_SF(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, mask_sh),\
130 AUX_SF(AUX_SW_STATUS, AUX_SW_DONE, mask_sh),\
227 * the AUX_SW_STATUS.AUX_SW_DONE bit.
230 * During normal operation, AUX_SW_STATUS.AUX_SW_DONE bit is set
H A Ddce_aux.c221 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0, in submit_channel_request()
289 *sw_status = REG_GET(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, in read_channel_reply()
350 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1, in get_channel_status()
353 value = REG_READ(AUX_SW_STATUS); in get_channel_status()
379 AUX_SW_STATUS, in get_channel_status()
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dradeon_dp_auxch.c153 tmp = RREG32(AUX_SW_STATUS + aux_offset[instance]); in radeon_dp_aux_transfer_native()
H A Dnid.h848 #define AUX_SW_STATUS 0x6210 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dradeon_dp_auxch.c153 tmp = RREG32(AUX_SW_STATUS + aux_offset[instance]); in radeon_dp_aux_transfer_native()
H A Dnid.h848 #define AUX_SW_STATUS 0x6210 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h587 SRI_ARR(AUX_SW_STATUS, DP_AUX, id) \

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