Searched refs:AT91_PMC_MCKR (Results 1 - 9 of 9) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/at91/ |
| H A D | clk-h32mx.c | 34 regmap_read(h32mxclk->regmap, AT91_PMC_MCKR, &mckr); in clk_sama5d4_h32mx_recalc_rate()
72 regmap_update_bits(h32mxclk->regmap, AT91_PMC_MCKR, in clk_sama5d4_h32mx_set_rate()
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| H A D | clk-plldiv.c | 28 regmap_read(plldiv->regmap, AT91_PMC_MCKR, &mckr); in clk_plldiv_recalc_rate()
61 regmap_update_bits(plldiv->regmap, AT91_PMC_MCKR, AT91_PMC_PLLADIV2, in clk_plldiv_set_rate()
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| H A D | pmc.c | 184 regmap_read(pmcreg, AT91_PMC_MCKR, &pmc_cache.mckr); in pmc_suspend()
219 regmap_read(pmcreg, AT91_PMC_MCKR, &tmp); in pmc_resume()
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| H A D | clk-master.c | 449 .offset = AT91_PMC_MCKR,
455 .offset = AT91_PMC_MCKR,
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| /kernel/linux/linux-6.6/drivers/clk/at91/ |
| H A D | clk-h32mx.c | 34 regmap_read(h32mxclk->regmap, AT91_PMC_MCKR, &mckr); in clk_sama5d4_h32mx_recalc_rate()
72 regmap_update_bits(h32mxclk->regmap, AT91_PMC_MCKR, in clk_sama5d4_h32mx_set_rate()
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| H A D | clk-plldiv.c | 28 regmap_read(plldiv->regmap, AT91_PMC_MCKR, &mckr); in clk_plldiv_recalc_rate()
61 regmap_update_bits(plldiv->regmap, AT91_PMC_MCKR, AT91_PMC_PLLADIV2, in clk_plldiv_set_rate()
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| H A D | clk-master.c | 875 .offset = AT91_PMC_MCKR,
881 .offset = AT91_PMC_MCKR,
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| /kernel/linux/linux-5.10/include/linux/clk/ |
| H A D | at91_pmc.h | 97 #define AT91_PMC_MCKR 0x30 /* Master Clock Register */ macro
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| /kernel/linux/linux-6.6/include/linux/clk/ |
| H A D | at91_pmc.h | 103 #define AT91_PMC_MCKR 0x30 /* Master Clock Register */ macro
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