A2W_PLL_DIV_BITS (reference) in projects: kernel

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/kernel/linux/linux-5.10/drivers/clk/bcm/
H A D	clk-bcm2835.c	`256 #define A2W_PLL_DIV_BITS 8 macro 862 u32 cm, div, max_div = 1 << A2W_PLL_DIV_BITS; in bcm2835_pll_divider_set_rate() 1376 divider->div.width = A2W_PLL_DIV_BITS; in bcm2835_register_pll_divider()`
/kernel/linux/linux-6.6/drivers/clk/bcm/
H A D	clk-bcm2835.c	`257 #define A2W_PLL_DIV_BITS 8 macro 864 u32 cm, div, max_div = 1 << A2W_PLL_DIV_BITS; in bcm2835_pll_divider_set_rate() 1404 divider->div.width = A2W_PLL_DIV_BITS; in bcm2835_register_pll_divider()`