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Searched refs:cfg (Results 1 - 25 of 81) sorted by relevance

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/drivers/hdf_core/framework/model/storage/src/mtd/
H A Dmtd_spi_common.c14 struct MtdSpiConfig *cfg = NULL; in SpiFlashDumpDefualt() local
26 cfg = &spi->readCfg; in SpiFlashDumpDefualt()
28 cfg->ifType, cfg->cmd, cfg->dummy, cfg->size, cfg->clock); in SpiFlashDumpDefualt()
29 cfg = &spi->writeCfg; in SpiFlashDumpDefualt()
31 cfg->ifType, cfg in SpiFlashDumpDefualt()
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/drivers/hdf_core/framework/test/unittest/platform/common/
H A Dgpio_test.c90 ret = GpioTestGetConfig(&tester.cfg); in GpioTesterGet()
96 tester.cfg.gpio, tester.cfg.gpioIrq, tester.cfg.testUserApi, tester.cfg.gpioTestTwo, tester.cfg.testNameOne, in GpioTesterGet()
97 tester.cfg.testNameTwo); in GpioTesterGet()
114 ret = GpioGetDir(tester->cfg.gpio, &tester->oldDir); in GpioTestSetUp()
119 ret = GpioRead(tester->cfg.gpio, &tester->oldVal); in GpioTestSetUp()
142 ret = GpioSetDir(tester->cfg in GpioTestTearDown()
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H A Dpwm_test.c112 struct PwmConfig cfg = {0}; in PwmSetGetConfigTest() local
115 number = tester->config.cfg.number; in PwmSetGetConfigTest()
116 tester->config.cfg.number = ((number > 0) ? 0 : TEST_WAVES_NUMBER); in PwmSetGetConfigTest()
117 HDF_LOGI("PwmSetGetConfigTest: set number %u!", tester->config.cfg.number); in PwmSetGetConfigTest()
118 ret = PwmSetConfig(tester->handle, &(tester->config.cfg)); in PwmSetGetConfigTest()
125 tester->config.cfg.number = number; in PwmSetGetConfigTest()
126 HDF_LOGI("PwmSetGetConfigTest: Set number %u.", tester->config.cfg.number); in PwmSetGetConfigTest()
127 ret = PwmSetConfig(tester->handle, &(tester->config.cfg)); in PwmSetGetConfigTest()
133 ret = PwmGetConfig(tester->handle, &cfg); in PwmSetGetConfigTest()
139 if (memcmp(&cfg, in PwmSetGetConfigTest()
150 struct PwmConfig cfg = {0}; PwmSetPeriodTest() local
177 struct PwmConfig cfg = {0}; PwmSetDutyTest() local
204 struct PwmConfig cfg = {0}; PwmSetPolarityTest() local
239 struct PwmConfig cfg = {0}; PwmEnableTest() local
271 struct PwmConfig cfg = {0}; PwmDisableTest() local
305 struct PwmConfig cfg = {0}; PwmReliabilityTest() local
345 struct PwmConfig cfg = {0}; PwmIfPerformanceTest() local
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H A Dmipi_dsi_test.c85 struct MipiCfg cfg; in MipiDsiGetCfgTest() local
87 ret = MipiDsiGetCfg(test->handle, &cfg); in MipiDsiGetCfgTest()
89 if (CmpStVal(&cfg, &test->cfg)) { in MipiDsiGetCfgTest()
134 ret = MipiDsiSetCfg(test->handle, &test->cfg); in MipiDsiTestByCmd()
187 test.cfg.lane = DSI_2_LANES; in MipiDsiTestBind()
188 test.cfg.mode = DSI_VIDEO_MODE; in MipiDsiTestBind()
189 test.cfg.format = FORMAT_RGB_24_BIT; in MipiDsiTestBind()
190 test.cfg.burstMode = VIDEO_BURST_MODE; in MipiDsiTestBind()
191 test.cfg in MipiDsiTestBind()
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/drivers/hdf_core/adapter/khdf/liteos/model/bus/usb/
H A Dhdf_usb.c50 struct UsbConfig cfg[USB_MAX_CFG_LEN]; member
67 struct UsbConfig *cfg) in GetUsbControllerParam()
71 ret = instance->GetUint32(node, "res_type", &cfg->type, 0); in GetUsbControllerParam()
76 ret = instance->GetUint32(node, "res_unit", &cfg->unit, 0); in GetUsbControllerParam()
81 ret = instance->GetUint32(node, "res_start", &cfg->start, 0); in GetUsbControllerParam()
86 ret = instance->GetUint32(node, "res_end", &cfg->end, 0); in GetUsbControllerParam()
91 ret = instance->GetUint32(node, "res_count", &cfg->count, 0); in GetUsbControllerParam()
114 struct UsbConfig *cfg = &(info->cfg[index]); in ProcControllorParam() local
126 ret = GetUsbControllerParam(instance, subNode, cfg); in ProcControllorParam()
66 GetUsbControllerParam(const struct DeviceResourceIface *instance, const struct DeviceResourceNode *node, struct UsbConfig *cfg) GetUsbControllerParam() argument
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/drivers/hdf_core/framework/support/platform/src/hdmi/
H A Dhdmi_scdc.c18 struct HdmiDdcCfg cfg = {0}; in HdmiScdcRead() local
26 cfg.type = HDMI_DDC_DEV_SCDC; in HdmiScdcRead()
27 cfg.readFlag = true; in HdmiScdcRead()
28 cfg.devAddr = HDMI_DDC_SCDC_DEV_ADDRESS; in HdmiScdcRead()
29 cfg.data = buffer; in HdmiScdcRead()
30 cfg.dataLen = len; in HdmiScdcRead()
31 cfg.offset = offset; in HdmiScdcRead()
32 cfg.mode = HDMI_DDC_MODE_READ_MUTIL_NO_ACK; in HdmiScdcRead()
33 return HdmiDdcTransfer(&(cntlr->ddc), &cfg); in HdmiScdcRead()
38 struct HdmiDdcCfg cfg in HdmiScdcWrite() local
92 HdmiScdcReadConfig0(const struct HdmiScdc *scdc, uint8_t *cfg) HdmiScdcReadConfig0() argument
97 HdmiScdcReadConfig1(const struct HdmiScdc *scdc, uint8_t *cfg) HdmiScdcReadConfig1() argument
143 HdmiScdcWriteConfig0(const struct HdmiScdc *scdc, uint8_t *cfg) HdmiScdcWriteConfig0() argument
148 HdmiScdcWriteConfig1(const struct HdmiScdc *scdc, uint8_t *cfg) HdmiScdcWriteConfig1() argument
188 union HdmiScdcsConfig0 cfg = {0}; HdmiScdcRrDisable() local
214 union HdmiScdcsTmdsConfig cfg = {0}; HdmiScdcScrambleSet() local
244 union HdmiScdcsTmdsConfig cfg = {0}; HdmiScdcScrambleGet() local
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H A Dhdmi_frl.c76 uint8_t cfg = 0; in HdmiFrlGetTestConfig1() local
78 if (HdmiScdcOptMsgHandle(scdc, HDMI_SCDC_OPT_GET_TEST_CONFIG_1, &cfg, sizeof(cfg)) != HDF_SUCCESS) { in HdmiFrlGetTestConfig1()
82 return cfg; in HdmiFrlGetTestConfig1()
133 union HdmiScdcsConfig1 cfg = {0}; in HdmiFrlSetTrainRate() local
142 cfg.bits.frlRate = frl->info.curFrlRate; in HdmiFrlSetTrainRate()
143 cfg.bits.ffeLevels = HDMI_FRL_TXFFE_MODE_0; in HdmiFrlSetTrainRate()
145 HdmiFrlSetConfig1(cntlr->scdc, &(cfg.data)); in HdmiFrlSetTrainRate()
273 union HdmiScdcsTestConfig1 cfg = {0}; in HdmiFrlIsCtsMode() local
275 cfg in HdmiFrlIsCtsMode()
313 struct HdmiFrlAudioNctsConfig cfg = {0}; HdmiFrlAudioNctsSet() local
338 struct HdmiPhyCfg cfg = {0}; HdmiFrlTxffeSet() local
355 struct HdmiPhyCfg cfg = {0}; HdmiFrlphyConfigSet() local
409 struct HdmiFrlTrainConfig cfg = {0}; HdmiFrlConfigAndStartTraining() local
471 struct HdmiPhyCfg cfg = {0}; HdmiFrlTrainingException() local
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H A Dhdmi_ddc.c29 int32_t HdmiDdcTransfer(struct HdmiDdc *ddc, struct HdmiDdcCfg *cfg) in HdmiDdcTransfer() argument
33 if (ddc == NULL || cfg == NULL) { in HdmiDdcTransfer()
37 if (cfg->mode >= HDMI_DDC_MODE_BUTT) { in HdmiDdcTransfer()
42 ret = HdmiCntlrDdcTransfer(ddc->priv, cfg); in HdmiDdcTransfer()
H A Dhdmi_hdcp.c16 struct HdmiDdcCfg cfg = {0}; in HdmiHdcpRead() local
24 cfg.type = HDMI_DDC_DEV_HDCP; in HdmiHdcpRead()
25 cfg.readFlag = true; in HdmiHdcpRead()
26 cfg.devAddr = HDMI_DDC_HDCP_DEV_ADDRESS; in HdmiHdcpRead()
27 cfg.data = buffer; in HdmiHdcpRead()
28 cfg.dataLen = len; in HdmiHdcpRead()
29 cfg.offset = offset; in HdmiHdcpRead()
30 cfg.mode = HDMI_DDC_MODE_READ_MUTIL_NO_ACK; in HdmiHdcpRead()
31 return HdmiDdcTransfer(&(cntlr->ddc), &cfg); in HdmiHdcpRead()
36 struct HdmiDdcCfg cfg in HdmiHdcpWrite() local
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/drivers/hdf_core/framework/test/unittest/platform/virtual/
H A Dpwm_virtual.c64 pwm->cfg = *config; in VirtualPwmSetConfig()
91 virtual->dev.cfg.duty = PWM_DEFAULT_DUTY_CYCLE; in VirtualPwmProbe()
92 virtual->dev.cfg.period = PWM_DEFAULT_PERIOD; in VirtualPwmProbe()
93 virtual->dev.cfg.polarity = PWM_DEFAULT_POLARITY; in VirtualPwmProbe()
94 virtual->dev.cfg.status = PWM_DISABLE_STATUS; in VirtualPwmProbe()
95 virtual->dev.cfg.number = virtual->dev.num; in VirtualPwmProbe()
102 virtual->dev.cfg.number, virtual->dev.cfg.period, virtual->dev.cfg.duty, in VirtualPwmProbe()
103 virtual->dev.cfg in VirtualPwmProbe()
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H A Dspi_virtual.c40 struct SpiCfg cfg; member
101 if ((virtual->cfg.mode & SPI_MODE_LOOP) != 0 && virtual->ringBuffer == NULL) { in RingBufferConfig()
107 } else if ((virtual->cfg.mode & SPI_MODE_LOOP) == 0) { in RingBufferConfig()
130 uint8_t bytes = VirtualSpiToByteWidth(virtual->cfg.bitsPerWord); in VirtualSpiWriteFifo()
132 if ((virtual->cfg.mode & SPI_MODE_LOOP) == 0 || virtual->ringBuffer == NULL) { in VirtualSpiWriteFifo()
152 uint8_t bytes = VirtualSpiToByteWidth(virtual->cfg.bitsPerWord); in VirtualSpiReadFifo()
154 if ((virtual->cfg.mode & SPI_MODE_LOOP) == 0 || virtual->ringBuffer == NULL) { in VirtualSpiReadFifo()
223 static int32_t VirtualSpiSetCfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) in VirtualSpiSetCfg() argument
227 if (cntlr == NULL || cntlr->priv == NULL || cfg == NULL) { in VirtualSpiSetCfg()
228 HDF_LOGE("VirtualSpiSetCfg: cntlr priv or cfg i in VirtualSpiSetCfg()
240 VirtualSpiGetCfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) VirtualSpiGetCfg() argument
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/drivers/hdf_core/adapter/khdf/linux/platform/mipi_dsi/
H A Dmipi_tx_hi35xx.c386 static void MipiTxDrvSetPhyCfg(const ComboDevCfgTag *cfg) in MipiTxDrvSetPhyCfg() argument
390 if (cfg == NULL) { in MipiTxDrvSetPhyCfg()
391 HDF_LOGE("MipiTxDrvSetPhyCfg: cfg is null!"); in MipiTxDrvSetPhyCfg()
396 MipiTxDrvSetPhyPllSetX(cfg->phyDataRate); in MipiTxDrvSetPhyCfg()
407 if (cfg->outputMode == OUTPUT_MODE_CSI) { in MipiTxDrvSetPhyCfg()
408 if (cfg->outputFormat == OUT_FORMAT_YUV420_8_BIT_NORMAL) { in MipiTxDrvSetPhyCfg()
411 } else if (cfg->outputFormat == OUT_FORMAT_YUV422_8_BIT) { in MipiTxDrvSetPhyCfg()
416 if (cfg->outputFormat == OUT_FORMAT_RGB_16_BIT) { in MipiTxDrvSetPhyCfg()
419 } else if (cfg->outputFormat == OUT_FORMAT_RGB_18_BIT) { in MipiTxDrvSetPhyCfg()
422 } else if (cfg in MipiTxDrvSetPhyCfg()
447 SetOutputFormat(const ComboDevCfgTag *cfg) SetOutputFormat() argument
472 SetVideoModeCfg(const ComboDevCfgTag *cfg) SetVideoModeCfg() argument
489 SetTimingConfig(const ComboDevCfgTag *cfg) SetTimingConfig() argument
547 MipiTxDrvSetControllerCfg(const ComboDevCfgTag *cfg) MipiTxDrvSetControllerCfg() argument
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/drivers/hdf_core/framework/support/platform/test/fuzztest/spi_fuzzer/
H A Dspi_fuzzer.cpp39 static void SpiFuzzDoTest(DevHandle handle, struct SpiDevInfo *info, struct SpiMsg *msg, struct SpiCfg *cfg) in SpiFuzzDoTest() argument
52 SpiSetCfg(handle, cfg); in SpiFuzzDoTest()
62 struct SpiCfg cfg; in SpiFuzzTest() local
90 cfg.maxSpeedHz = params->desMaxSpeedHz; in SpiFuzzTest()
91 cfg.mode = params->desMode; in SpiFuzzTest()
92 cfg.transferMode = params->desTransferMode; in SpiFuzzTest()
93 cfg.bitsPerWord = params->desBitsPerWord; in SpiFuzzTest()
99 SpiFuzzDoTest(handle, &info, &msg, &cfg); in SpiFuzzTest()
/drivers/hdf_core/framework/support/platform/include/spi/
H A Dspi_core.h22 int32_t (*GetCfg)(struct SpiCntlr *cntlr, struct SpiCfg *cfg);
23 int32_t (*SetCfg)(struct SpiCntlr *cntlr, struct SpiCfg *cfg);
44 struct SpiCfg cfg; member
79 int32_t SpiCntlrSetCfg(struct SpiCntlr *cntlr, uint32_t csNum, struct SpiCfg *cfg);
80 int32_t SpiCntlrGetCfg(struct SpiCntlr *cntlr, uint32_t csNum, struct SpiCfg *cfg);
/drivers/hdf_core/framework/support/platform/src/can/
H A Dcan_if.c50 int32_t CanBusSetCfg(DevHandle handle, const struct CanConfig *cfg) in CanBusSetCfg() argument
52 return CanClientSetCfg((struct CanClient *)handle, cfg); in CanBusSetCfg()
55 int32_t CanBusGetCfg(DevHandle handle, struct CanConfig *cfg) in CanBusGetCfg() argument
57 return CanClientGetCfg((struct CanClient *)handle, cfg); in CanBusGetCfg()
/drivers/hdf_core/framework/support/platform/src/mipi/
H A Dmipi_dsi_if.c24 int32_t MipiDsiSetCfg(DevHandle handle, struct MipiCfg *cfg) in MipiDsiSetCfg() argument
26 return MipiDsiCntlrSetCfg((struct MipiDsiCntlr *)handle, cfg); in MipiDsiSetCfg()
29 int32_t MipiDsiGetCfg(DevHandle handle, struct MipiCfg *cfg) in MipiDsiGetCfg() argument
31 return MipiDsiCntlrGetCfg((struct MipiDsiCntlr *)handle, cfg); in MipiDsiGetCfg()
/drivers/hdf_core/framework/model/display/driver/adapter_soc/
H A Dhi35xx_disp.c201 struct MipiCfg cfg; in MipiDsiInit() local
208 cfg.lane = info->mipi.lane; in MipiDsiInit()
209 cfg.mode = info->mipi.mode; in MipiDsiInit()
210 cfg.format = info->mipi.format; in MipiDsiInit()
211 cfg.burstMode = info->mipi.burstMode; in MipiDsiInit()
212 cfg.timing.xPixels = info->width; in MipiDsiInit()
213 cfg.timing.hsaPixels = info->hsw; in MipiDsiInit()
214 cfg.timing.hbpPixels = info->hbp; in MipiDsiInit()
215 cfg.timing.hlinePixels = info->width + info->hbp + info->hfp + info->hsw; in MipiDsiInit()
216 cfg in MipiDsiInit()
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/drivers/hdf_core/framework/support/platform/src/timer/
H A Dtimer_if_u.c242 struct TimerConfig cfg; in HwTimerSet() local
255 if (memset_s(&cfg, sizeof(cfg), 0, sizeof(cfg)) != EOK) { in HwTimerSet()
259 cfg.useconds = useconds; in HwTimerSet()
279 if (!HdfSbufWriteBuffer(buf, &cfg, sizeof(cfg))) { in HwTimerSet()
280 HDF_LOGE("HwTimerSet: sbuf write cfg fail!"); in HwTimerSet()
303 struct TimerConfig cfg; in HwTimerSetOnce() local
316 if (memset_s(&cfg, sizeo in HwTimerSetOnce()
366 struct TimerConfig cfg; HwTimerGet() local
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/drivers/hdf_core/framework/support/platform/include/i2s/
H A Di2s_core.h22 int32_t (*GetCfg)(struct I2sCntlr *cntlr, struct I2sCfg *cfg);
23 int32_t (*SetCfg)(struct I2sCntlr *cntlr, struct I2sCfg *cfg);
68 int32_t I2sCntlrSetCfg(struct I2sCntlr *cntlr, struct I2sCfg *cfg);
69 int32_t I2sCntlrGetCfg(struct I2sCntlr *cntlr, struct I2sCfg *cfg);
/drivers/hdf_core/adapter/khdf/linux/platform/pwm/
H A Dpwm_adapter.c40 pwm->cfg.period = device->state.period; in HdfPwmOpen()
41 pwm->cfg.duty = device->state.duty_cycle; in HdfPwmOpen()
42 pwm->cfg.polarity = device->state.polarity; in HdfPwmOpen()
43 pwm->cfg.status = device->state.enabled ? PWM_ENABLE_STATUS : PWM_DISABLE_STATUS; in HdfPwmOpen()
121 pwm->cfg.number = 0; in HdfPwmInit()
/drivers/hdf_core/framework/model/network/wifi/platform/include/message/
H A Dsidecar.h99 Service *InitService(struct ServiceDef *def, const ServiceCfg *cfg);
108 Service *CreateService##ServiceName(const ServiceCfg *cfg) \
115 return InitService(&serviceDef, cfg); \
118 #define CreateService(ServiceName, cfg) CreateService##ServiceName(cfg)
/drivers/hdf_core/framework/support/platform/src/fwk/
H A Dplatform_queue.c102 struct OsalThreadParam cfg; in PlatformQueueStart() local
116 cfg.name = (char *)queue->name; in PlatformQueueStart()
117 cfg.priority = OSAL_THREAD_PRI_HIGHEST; in PlatformQueueStart()
118 cfg.stackSize = PLAT_QUEUE_THREAD_STAK; in PlatformQueueStart()
119 ret = OsalThreadStart(&queue->thread, &cfg); in PlatformQueueStart()
120 (void)cfg; in PlatformQueueStart()
/drivers/hdf_core/framework/support/platform/src/i2s/
H A Di2s_if.c215 void I2sSetCfg(DevHandle handle, struct I2sCfg *cfg) in I2sSetCfg() argument
219 if (cntlr == NULL || cfg == NULL) { in I2sSetCfg()
220 HDF_LOGE("I2sSetCfg: cntlr or cfg is null!"); in I2sSetCfg()
224 int ret = I2sCntlrSetCfg(cntlr, cfg); in I2sSetCfg()
226 HDF_LOGE("I2sSetCfg: i2s cntlr set cfg fail!"); in I2sSetCfg()
229 void I2sGetCfg(DevHandle handle, struct I2sCfg *cfg) in I2sGetCfg() argument
233 if (cntlr == NULL || cfg == NULL) { in I2sGetCfg()
234 HDF_LOGE("I2sGetCfg: cntlr or cfg is null!"); in I2sGetCfg()
238 int ret = I2sCntlrGetCfg(cntlr, cfg); in I2sGetCfg()
240 HDF_LOGE("I2sGetCfg: i2s cntlr get cfg fai in I2sGetCfg()
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/drivers/hdf_core/adapter/khdf/linux/platform/spi/
H A Dspi_adapter.c81 static int32_t SpiAdapterSetCfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) in SpiAdapterSetCfg() argument
87 if (cntlr == NULL || cfg == NULL) { in SpiAdapterSetCfg()
98 spidev->bits_per_word = cfg->bitsPerWord; in SpiAdapterSetCfg()
99 spidev->max_speed_hz = cfg->maxSpeedHz; in SpiAdapterSetCfg()
100 spidev->mode = HdfSpiModeToLinuxMode(cfg->mode); in SpiAdapterSetCfg()
107 dev->cfg = *cfg; in SpiAdapterSetCfg()
111 static int32_t SpiAdapterGetCfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) in SpiAdapterGetCfg() argument
115 if (cntlr == NULL || cfg == NULL) { in SpiAdapterGetCfg()
125 *cfg in SpiAdapterGetCfg()
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/drivers/hdf_core/framework/model/display/driver/lcdkit/
H A Dlcdkit_parse_config.c227 static int32_t ParsePanelConfig(const struct DeviceResourceNode *node, struct PanelConfig *cfg) in ParsePanelConfig() argument
236 if (ParsePanelInfo(node, drsOps, &cfg->info)) { in ParsePanelConfig()
240 PARSE_PANEL_SYMBOL(node, drsOps, "dsiDev", &cfg->dsiDev); in ParsePanelConfig()
241 if (ParsePowerSetting(node, drsOps, &cfg->setting)) { in ParsePanelConfig()
245 if (ParseCmdConfig(node, drsOps, "panelOnCmd", &cfg->onCmd)) { in ParsePanelConfig()
249 if (ParseCmdConfig(node, drsOps, "panelOffCmd", &cfg->offCmd)) { in ParsePanelConfig()
253 if (ParsePowerSequeue(node, drsOps, "powerOnSeq", &cfg->onSeq)) { in ParsePanelConfig()
257 if (ParsePowerSequeue(node, drsOps, "powerOffSeq", &cfg->offSeq)) { in ParsePanelConfig()
264 int32_t ParseLcdConfig(const struct DeviceResourceNode *node, struct PanelConfig *cfg) in ParseLcdConfig() argument
266 if (node == NULL || cfg in ParseLcdConfig()
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