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/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.c60 #define VOP_WIN_SUPPORT(vop, win, name) VOP_REG_SUPPORT(vop, (win)->phy->name)
62 #define VOP_WIN_SCL_EXT_SUPPORT(vop, win, name) ((win)->phy->scl->ext && \
63 VOP_REG_SUPPORT(vop, (win)->phy->scl->ext->name))
84 #define VOP_WIN_SET(x, win, name, v) REG_SET((x), (name), (win)->offset, VOP_WIN_NAME(win, name), (v), true)
85 #define VOP_WIN_SET_EXT(x, win, ext, name, v) REG_SET((x), (name), 0, (win)
281 struct vop_win win[]; global() member
388 vop_get_win_phy(struct vop_win *win, const struct vop_reg *reg) vop_get_win_phy() argument
500 struct vop_win *win = &vop->win[i]; vop_is_allwin_disabled() local
510 vop_win_disable(struct vop *vop, struct vop_win *win) vop_win_disable() argument
534 struct vop_win *win = &vop->win[i]; vop_disable_allwin() local
757 scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win *win, uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, uint32_t pixel_format) scl_vop_cal_scl_fac() argument
895 struct vop_win *win = to_vop_win(plane); vop_hdr_atomic_check() local
939 struct vop_win *win = to_vop_win(plane); vop_hdr_atomic_check() local
1168 struct vop_win *win = to_vop_win(plane); vop_csc_atomic_check() local
1545 struct vop_win *win = &vop->win[i]; vop_initial() local
1637 struct vop_win *win = to_vop_win(plane); vop_plane_atomic_check() local
1747 struct vop_win *win = to_vop_win(plane); vop_plane_atomic_disable() local
1783 struct vop_win *win = to_vop_win(plane); vop_plane_atomic_update() local
2117 struct vop_win *win = to_vop_win(plane); vop_atomic_plane_reset() local
2166 struct vop_win *win = to_vop_win(plane); vop_atomic_plane_set_property() local
2198 struct vop_win *win = to_vop_win(plane); vop_atomic_plane_get_property() local
2365 struct vop_win *win = to_vop_win(plane); vop_plane_info_dump() local
2588 struct vop_win *win = to_vop_win(pstate->plane); vop_plane_line_bandwidth() local
3164 struct vop_win *win; vop_afbdc_atomic_check() local
3358 struct vop_win *win; vop_crtc_atomic_check() local
4135 vop_plane_add_properties(struct vop *vop, struct drm_plane *plane, const struct vop_win *win) vop_plane_add_properties() argument
4146 vop_plane_create_name_property(struct vop *vop, struct vop_win *win) vop_plane_create_name_property() argument
4163 vop_plane_init(struct vop *vop, struct vop_win *win, unsigned long possible_crtcs) vop_plane_init() argument
4384 struct vop_win *win = &vop->win[i]; vop_create_crtc() local
4415 struct vop_win *win = &vop->win[i]; vop_create_crtc() local
[all...]
H A Drockchip_drm_vop2.c63 #define VOP_CLUSTER_SET(x, win, name, v) \
65 if ((win)->regs->cluster) \
66 REG_SET(x, name, 0, (win)->regs->cluster->name, v, true); \
69 #define VOP_AFBC_SET(x, win, name, v) \
71 if ((win)->regs->afbc) \
72 REG_SET(x, name, (win)->offset, (win)->regs->afbc->name, v, true); \
75 #define VOP_WIN_SET(x, win, name, v) REG_SET(x, name, (win)->offset, VOP_WIN_NAME(win, nam
698 struct vop2_win win[]; global() member
859 vop2_is_mirror_win(struct vop2_win *win) vop2_is_mirror_win() argument
898 vop2_get_win_regs(struct vop2_win *win, const struct vop_reg *reg) vop2_get_win_regs() argument
931 struct vop2_win *win; vop2_find_win_by_phys_id() local
1523 vop2_win_enable(struct vop2_win *win) vop2_win_enable() argument
1548 vop2_win_disable(struct vop2_win *win, bool skip_splice_win) vop2_win_disable() argument
1908 vop2_multi_area_sub_window(struct vop2_win *win) vop2_multi_area_sub_window() argument
1913 vop2_cluster_window(struct vop2_win *win) vop2_cluster_window() argument
1918 vop2_cluster_sub_window(struct vop2_win *win) vop2_cluster_sub_window() argument
2071 vop2_get_cluster_lb_mode(struct vop2_win *win, struct vop2_plane_state *vpstate) vop2_get_cluster_lb_mode() argument
2139 vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win, uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, uint32_t pixel_format) vop2_setup_scale() argument
2265 struct vop2_win *win; vop2_is_allwin_disabled() local
2283 struct vop2_win *win; vop2_disable_all_planes_for_crtc() local
3143 struct vop2_win *win; vop2_layer_map_initial() local
3448 struct vop2_win *win = to_vop2_win(plane); vop2_cluster_two_win_mode_check() local
3487 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
3521 struct vop2_win *win = to_vop2_win(plane); vop2_plane_splice_check() local
3551 struct vop2_win *win = to_vop2_win(plane); vop2_plane_atomic_check() local
3746 struct vop2_win *win = to_vop2_win(plane); vop2_plane_atomic_disable() local
3782 struct vop2_win *win = to_vop2_win(plane); vop2_plane_setup_color_key() local
3871 rk3588_vop2_win_cfg_axi(struct vop2_win *win) rk3588_vop2_win_cfg_axi() argument
3893 vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, struct drm_rect *dst, struct drm_plane_state *pstate) vop2_win_atomic_update() argument
4123 struct vop2_win *win = to_vop2_win(plane); vop2_plane_atomic_update() local
4368 struct vop2_win *win = to_vop2_win(plane); vop2_atomic_plane_reset() local
4420 struct vop2_win *win = to_vop2_win(plane); vop2_atomic_plane_set_property() local
4452 struct vop2_win *win = to_vop2_win(plane); vop2_atomic_plane_get_property() local
4644 struct vop2_win *win = to_vop2_win(plane); vop2_plane_info_dump() local
6255 struct vop2_win *win = vop2_find_win_by_phys_id(vop2, win_phys_id); vop2_setup_hdr10() local
6571 struct vop2_win *win; vop2_setup_alpha() local
6769 struct vop2_win *win; vop2_setup_layer_mixer_for_vp() local
6894 struct vop2_win *win; vop2_setup_dly_for_window() local
6950 struct vop2_win *win = to_vop2_win(plane); vop2_crtc_atomic_begin() local
6971 struct vop2_win *win = to_vop2_win(plane); vop2_crtc_atomic_begin() local
7049 struct vop2_win *win = to_vop2_win(plane); vop2_crtc_atomic_begin() local
7853 vop2_plane_create_name_property(struct vop2 *vop2, struct vop2_win *win) vop2_plane_create_name_property() argument
7871 vop2_plane_create_feature_property(struct vop2 *vop2, struct vop2_win *win) vop2_plane_create_feature_property() argument
7902 vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, unsigned long possible_crtcs) vop2_plane_init() argument
8005 struct vop2_win *win; vop2_cursor_plane_init() local
8145 struct vop2_win *win = NULL; vop2_create_crtc() local
8458 struct vop2_win *win; vop2_win_init() local
[all...]
H A Drockchip_vop_reg.c354 .win = rk3288_vop_win_data,
368 .win = rk3288_vop_win_data,
465 .win = rk3368_vop_win_data,
493 .win = rk3368_vop_win_data,
655 .win = rk3399_vop_win_data,
690 .win = rk3399_vop_lit_win_data,
708 .win = rk322x_vop_win_data,
981 .win = rk3328_vop_win_data,
1086 .win = rk3036_vop_win_data,
1185 .win
[all...]
H A Drockchip_drm_vop.h51 /* Left win in splice mode */
53 /* a mirror win can only get fb address
54 * from source win:
890 * win-->layer-->mixer-->vp--->connector(RGB/LVDS/HDMI/MIPI)
917 const struct vop_win_data *win; member
1039 * @win_size: hardware win number
1061 const struct vop2_win_data *win; member
/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop2.c65 #define VOP_CLUSTER_SET(x, win, name, v) \
67 if (win->regs->cluster) \
68 REG_SET(x, name, 0, win->regs->cluster->name, v, true); \
71 #define VOP_AFBC_SET(x, win, name, v) \
73 if (win->regs->afbc) \
74 REG_SET(x, name, win->offset, win->regs->afbc->name, v, true); \
77 #define VOP_WIN_SET(x, win, name, v) \
78 REG_SET(x, name, win->offset, VOP_WIN_NAME(win, nam
724 struct vop2_win win[]; global() member
883 vop2_is_mirror_win(struct vop2_win *win) vop2_is_mirror_win() argument
920 vop2_get_win_regs(struct vop2_win *win, const struct vop_reg *reg) vop2_get_win_regs() argument
952 struct vop2_win *win; vop2_find_win_by_phys_id() local
1526 vop2_win_enable(struct vop2_win *win) vop2_win_enable() argument
1550 vop2_win_disable(struct vop2_win *win, bool skip_splice_win) vop2_win_disable() argument
1909 vop2_multi_area_sub_window(struct vop2_win *win) vop2_multi_area_sub_window() argument
1914 vop2_cluster_window(struct vop2_win *win) vop2_cluster_window() argument
1919 vop2_cluster_sub_window(struct vop2_win *win) vop2_cluster_sub_window() argument
2069 vop2_get_cluster_lb_mode(struct vop2_win *win, struct vop2_plane_state *vpstate) vop2_get_cluster_lb_mode() argument
2137 vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win, uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, uint32_t pixel_format) vop2_setup_scale() argument
2262 struct vop2_win *win; vop2_is_allwin_disabled() local
2278 struct vop2_win *win; vop2_disable_all_planes_for_crtc() local
3138 struct vop2_win *win; vop2_layer_map_initial() local
3449 struct vop2_win *win = to_vop2_win(plane); vop2_cluster_two_win_mode_check() local
3490 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
3528 struct vop2_win *win = to_vop2_win(plane); vop2_plane_splice_check() local
3558 struct vop2_win *win = to_vop2_win(plane); vop2_plane_atomic_check() local
3755 struct vop2_win *win = to_vop2_win(plane); vop2_plane_atomic_disable() local
3789 struct vop2_win *win = to_vop2_win(plane); vop2_plane_setup_color_key() local
3876 rk3588_vop2_win_cfg_axi(struct vop2_win *win) rk3588_vop2_win_cfg_axi() argument
3896 vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, struct drm_rect *dst, struct drm_plane_state *pstate) vop2_win_atomic_update() argument
4121 struct vop2_win *win = to_vop2_win(plane); vop2_plane_atomic_update() local
4366 struct vop2_win *win = to_vop2_win(plane); vop2_atomic_plane_reset() local
4417 struct vop2_win *win = to_vop2_win(plane); vop2_atomic_plane_set_property() local
4452 struct vop2_win *win = to_vop2_win(plane); vop2_atomic_plane_get_property() local
4646 struct vop2_win *win = to_vop2_win(plane); vop2_plane_info_dump() local
6308 struct vop2_win *win = vop2_find_win_by_phys_id(vop2, win_phys_id); vop2_setup_hdr10() local
6610 struct vop2_win *win; vop2_setup_alpha() local
6823 struct vop2_win *win; vop2_setup_layer_mixer_for_vp() local
6947 struct vop2_win *win; vop2_setup_dly_for_window() local
7054 struct vop2_win *win = to_vop2_win(plane); vop2_crtc_atomic_begin() local
7073 struct vop2_win *win = to_vop2_win(plane); vop2_crtc_atomic_begin() local
7169 struct vop2_win *win = to_vop2_win(plane); vop2_crtc_atomic_begin() local
7956 vop2_plane_create_name_property(struct vop2 *vop2, struct vop2_win *win) vop2_plane_create_name_property() argument
7976 vop2_plane_create_feature_property(struct vop2 *vop2, struct vop2_win *win) vop2_plane_create_feature_property() argument
8007 vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, unsigned long possible_crtcs) vop2_plane_init() argument
8111 struct vop2_win *win; vop2_cursor_plane_init() local
8258 struct vop2_win *win = NULL; vop2_create_crtc() local
8570 struct vop2_win *win; vop2_win_init() local
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/rga3/
H A Drga_policy.c42 for (i = 0; i < data->win[win_num].num_of_raster_formats; i++) { in rga_check_format()
43 if (format == data->win[win_num].raster_formats[i]) { in rga_check_format()
49 for (i = 0; i < data->win[win_num].num_of_fbc_formats; i++) { in rga_check_format()
50 if (format == data->win[win_num].fbc_formats[i]) { in rga_check_format()
56 for (i = 0; i < data->win[win_num].num_of_tile_formats; i++) { in rga_check_format()
57 if (format == data->win[win_num].tile_formats[i]) { in rga_check_format()
224 /* only colorfill need single win (colorpalette?) */ in rga_job_assign()
227 if ((!(src0->rd_mode & data->win[0].rd_mode)) || in rga_job_assign()
228 (!(src1->rd_mode & data->win[1].rd_mode)) || in rga_job_assign()
229 (!(dst->rd_mode & data->win[ in rga_job_assign()
[all...]
H A Drga3_reg_info.c1233 static void addr_copy(struct rga_win_info_t *win, struct rga_img_info_t *img) in addr_copy() argument
1235 win->yrgb_addr = img->yrgb_addr; in addr_copy()
1236 win->uv_addr = img->uv_addr; in addr_copy()
1237 win->v_addr = img->v_addr; in addr_copy()
1238 win->enable = 1; in addr_copy()
1241 static void set_win_info(struct rga_win_info_t *win, struct rga_img_info_t *img) in set_win_info() argument
1243 win->x_offset = img->x_offset; in set_win_info()
1244 win->y_offset = img->y_offset; in set_win_info()
1245 win->src_act_w = img->act_w; in set_win_info()
1246 win in set_win_info()
[all...]
H A Drga_hw_config.c194 .win = rga3_win_data,
216 .win = rga2e_win_data,
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
H A Dcapture.c1192 win_en = cfg->win[0].win_en; in rkisp_get_cmsk()
1193 mode = cfg->win[0].mode; in rkisp_get_cmsk()
1196 win_en = cfg->win[1].win_en; in rkisp_get_cmsk()
1197 mode = cfg->win[1].mode; in rkisp_get_cmsk()
1201 win_en = cfg->win[STREAM_MP_SP_IVALUE].win_en; in rkisp_get_cmsk()
1202 mode = cfg->win[STREAM_MP_SP_IVALUE].mode; in rkisp_get_cmsk()
1209 cfg->win[i].win_en = !!(win_en & BIT(i)); in rkisp_get_cmsk()
1210 cfg->win[i].mode = !!(mode & BIT(i)); in rkisp_get_cmsk()
1234 win_en |= cfg->win[i].win_en ? BIT(i) : 0; in rkisp_set_cmsk()
1235 mode |= cfg->win[ in rkisp_set_cmsk()
[all...]
H A Drkisp.c1127 u32 mp_en = cfg->win[0].win_en; in rkisp_config_cmsk_single()
1128 u32 sp_en = cfg->win[1].win_en; in rkisp_config_cmsk_single()
1129 u32 bp_en = cfg->win[2].win_en; in rkisp_config_cmsk_single()
1134 val = cfg->win[0].mode; in rkisp_config_cmsk_single()
1141 val = cfg->win[1].mode; in rkisp_config_cmsk_single()
1148 val = cfg->win[0x02].mode; in rkisp_config_cmsk_single()
1157 val = ISP3X_SW_CMSK_YUV(cfg->win[i].cover_color_y, cfg->win[i].cover_color_u, cfg->win[i].cover_color_v); in rkisp_config_cmsk_single()
1160 val = ISP_PACK_2SHORT(cfg->win[ in rkisp_config_cmsk_single()
[all...]
H A Disp_params_v21.c787 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->win), arg->num_afm_win); in isp_rawaf_config()
791 h_size = arg->win[i].h_size; in isp_rawaf_config()
792 v_size = arg->win[i].v_size; in isp_rawaf_config()
793 h_offs = arg->win[i].h_offs < 0x02 ? 0x02 : arg->win[i].h_offs; in isp_rawaf_config()
794 v_offs = arg->win[i].v_offs < 1 ? 1 : arg->win[i].v_offs; in isp_rawaf_config()
891 ISP2X_RAWAE_LITE_V_OFFSET_SET(arg->win.v_offs) | ISP2X_RAWAE_LITE_H_OFFSET_SET(arg->win.h_offs), in isp_rawaelite_config()
894 block_hsize = arg->win in isp_rawaelite_config()
[all...]
H A Disp_params_v3x.c863 isp3_param_write(params_vdev, ISP_PACK_2SHORT(arg->win[0].h_offs, arg->win[0].v_offs), in isp_rawaebig_config_foraf()
866 block_hsize = arg->win[0].h_size / ae_wnd_num[wnd_num_idx]; in isp_rawaebig_config_foraf()
867 block_vsize = arg->win[0].v_size / ae_wnd_num[wnd_num_idx]; in isp_rawaebig_config_foraf()
877 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->win), arg->num_afm_win); in isp_rawaf_config()
880 h_size = arg->win[i].h_size; in isp_rawaf_config()
881 v_size = arg->win[i].v_size; in isp_rawaf_config()
882 h_offs = arg->win[i].h_offs < 0x02 ? 0x02 : arg->win[i].h_offs; in isp_rawaf_config()
883 v_offs = arg->win[ in isp_rawaf_config()
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
H A Dcapture.c1194 win_en = cfg->win[0].win_en; in rkisp_get_cmsk()
1195 mode = cfg->win[0].mode; in rkisp_get_cmsk()
1198 win_en = cfg->win[1].win_en; in rkisp_get_cmsk()
1199 mode = cfg->win[1].mode; in rkisp_get_cmsk()
1203 win_en = cfg->win[2].win_en; in rkisp_get_cmsk()
1204 mode = cfg->win[2].mode; in rkisp_get_cmsk()
1211 cfg->win[i].win_en = !!(win_en & BIT(i)); in rkisp_get_cmsk()
1212 cfg->win[i].mode = !!(mode & BIT(i)); in rkisp_get_cmsk()
1236 win_en |= cfg->win[i].win_en ? BIT(i) : 0; in rkisp_set_cmsk()
1237 mode |= cfg->win[ in rkisp_set_cmsk()
[all...]
H A Drkisp.c1142 u32 mp_en = cfg->win[0].win_en; in rkisp_config_cmsk_single()
1143 u32 sp_en = cfg->win[1].win_en; in rkisp_config_cmsk_single()
1144 u32 bp_en = cfg->win[2].win_en; in rkisp_config_cmsk_single()
1149 val = cfg->win[0].mode; in rkisp_config_cmsk_single()
1156 val = cfg->win[1].mode; in rkisp_config_cmsk_single()
1163 val = cfg->win[2].mode; in rkisp_config_cmsk_single()
1171 val = ISP3X_SW_CMSK_YUV(cfg->win[i].cover_color_y, in rkisp_config_cmsk_single()
1172 cfg->win[i].cover_color_u, in rkisp_config_cmsk_single()
1173 cfg->win[i].cover_color_v); in rkisp_config_cmsk_single()
1176 val = ISP_PACK_2SHORT(cfg->win[ in rkisp_config_cmsk_single()
[all...]
H A Disp_params_v21.c988 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->win), in isp_rawaf_config()
993 h_size = arg->win[i].h_size; in isp_rawaf_config()
994 v_size = arg->win[i].v_size; in isp_rawaf_config()
995 h_offs = arg->win[i].h_offs < 2 ? 2 : arg->win[i].h_offs; in isp_rawaf_config()
996 v_offs = arg->win[i].v_offs < 1 ? 1 : arg->win[i].v_offs; in isp_rawaf_config()
1102 ISP2X_RAWAE_LITE_V_OFFSET_SET(arg->win.v_offs) | in isp_rawaelite_config()
1103 ISP2X_RAWAE_LITE_H_OFFSET_SET(arg->win.h_offs), in isp_rawaelite_config()
1106 block_hsize = arg->win in isp_rawaelite_config()
[all...]
H A Disp_params_v3x.c1007 ISP_PACK_2SHORT(arg->win[0].h_offs, arg->win[0].v_offs), in isp_rawaebig_config_foraf()
1010 block_hsize = arg->win[0].h_size / ae_wnd_num[wnd_num_idx]; in isp_rawaebig_config_foraf()
1011 block_vsize = arg->win[0].v_size / ae_wnd_num[wnd_num_idx]; in isp_rawaebig_config_foraf()
1025 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->win), in isp_rawaf_config()
1029 h_size = arg->win[i].h_size; in isp_rawaf_config()
1030 v_size = arg->win[i].v_size; in isp_rawaf_config()
1031 h_offs = arg->win[i].h_offs < 2 ? 2 : arg->win[i].h_offs; in isp_rawaf_config()
1032 v_offs = arg->win[ in isp_rawaf_config()
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/rga3/include/
H A Drga_hw_config.h49 const struct rga_win_data *win; member
/device/soc/rockchip/common/sdk_linux/include/uapi/linux/
H A Drkisp2-config.h275 * win: priacy mask window
280 struct rkisp_cmsk_win win[RKISP_CMSK_WIN_MAX]; member
1469 struct isp2x_window win; member
1476 struct isp2x_window win; member
1483 struct isp2x_window win; member
1492 struct isp2x_window win[ISP2X_RAWAF_WIN_NUM]; member
1507 struct isp2x_window win; member
1526 struct isp2x_window win; member
1539 struct isp2x_window win; member
1549 struct isp2x_window win; member
1709 struct isp2x_siaf_meas_val win[ISP2X_AFM_MAX_WINDOWS]; global() member
[all...]
H A Drkisp3-config.h924 struct isp2x_window win[ISP3X_RAWAF_WIN_NUM]; member
/device/soc/rockchip/rk3588/kernel/include/uapi/linux/
H A Drkisp2-config.h288 * win: priacy mask window
293 struct rkisp_cmsk_win win[RKISP_CMSK_WIN_MAX]; member
1488 struct isp2x_window win; member
1495 struct isp2x_window win; member
1502 struct isp2x_window win; member
1511 struct isp2x_window win[ISP2X_RAWAF_WIN_NUM]; member
1526 struct isp2x_window win; member
1545 struct isp2x_window win; member
1558 struct isp2x_window win; member
1568 struct isp2x_window win; member
1729 struct isp2x_siaf_meas_val win[ISP2X_AFM_MAX_WINDOWS]; global() member
[all...]
H A Drkisp3-config.h924 struct isp2x_window win[ISP3X_RAWAF_WIN_NUM]; member
/device/board/hisilicon/hispark_aries/uboot/secureboot_release/ddr_init/drv/
H A Dddr_training_impl.c1138 DDR_DEBUG("Byte[%x] mode[%x] win on middle.", in ddr_adjust_byte()
1364 DDR_WARNING("Byte[%x] DQ[%x] no win.", byte_index, dq_num); in ddr_dataeye_deskew()
2177 /* Get totol win number of training result */
2205 /* Find the best vref which win number is max */
2235 DDR_DEBUG("byte[%x] vref[%x] win[%x] mode[%x]", in ddr_vref_find_best()
2266 DDR_DEBUG("byte[%x] default vref[%x] win[%x][%x] mode[%x]", in ddr_vref_cal()
3879 /* Duty Correction Control get win data */
3882 unsigned int win; in ddr_dcc_get_win() local
3887 win = rdqsbdl_right - rdqsbdl_left; in ddr_dcc_get_win()
3888 return win; in ddr_dcc_get_win()
[all...]
H A Dddr_training_impl.h319 unsigned int win; member
/device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/drv/
H A Dddr_training_impl.c1137 DDR_DEBUG("Byte[%x] mode[%x] win on middle.", in ddr_adjust_byte()
1363 DDR_WARNING("Byte[%x] DQ[%x] no win.", byte_index, dq_num); in ddr_dataeye_deskew()
2179 /* Get totol win number of training result */
2207 /* Find the best vref which win number is max */
2237 DDR_DEBUG("byte[%x] vref[%x] win[%x] mode[%x]", in ddr_vref_find_best()
2268 DDR_DEBUG("byte[%x] default vref[%x] win[%x][%x] mode[%x]", in ddr_vref_cal()
3881 /* Duty Correction Control get win data */
3884 unsigned int win; in ddr_dcc_get_win() local
3889 win = rdqsbdl_right - rdqsbdl_left; in ddr_dcc_get_win()
3890 return win; in ddr_dcc_get_win()
[all...]
H A Dddr_training_impl.h320 unsigned int win; member

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