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Searched refs:tolerance (Results 1 - 4 of 4) sorted by relevance

/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/sys/
H A Dtimex.h23 long constant, precision, tolerance; member
/device/soc/hisilicon/hi3516dv300/sdk_liteos/include/adapt/
H A Dhi_comm_isp_adapt.h1954 hi_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE adjust tolerance */ member
2109 hi_u16 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0;et the dynamic range tolerance. member
2240 hi_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AWB adjust tolerance */ member
/device/soc/hisilicon/hi3516dv300/sdk_linux/include/adapt/
H A Dhi_comm_isp_adapt.h1954 hi_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE adjust tolerance */ member
2109 hi_u16 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0;et the dynamic range tolerance. member
2240 hi_u8 tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AWB adjust tolerance */ member
/device/soc/rockchip/common/sdk_linux/drivers/tty/serial/8250/
H A D8250_port.c2775 unsigned int tolerance = port->uartclk / 0x64; in serial8250_get_baud_rate() local
2786 max = (port->uartclk + tolerance) / 0x4; in serial8250_get_baud_rate()
2789 max = (port->uartclk + tolerance) / PORT_SIXTEEN; in serial8250_get_baud_rate()
2794 * Allow 1% tolerance at the upper limit so uart clks marginally in serial8250_get_baud_rate()

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