Searched refs:temp1 (Results 1 - 6 of 6) sorted by relevance
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_tx/ |
H A D | mipi_tx_hal.c | 256 unsigned char temp1; in mipi_tx_drv_get_phy_clk_prepare() local 264 temp1 = temp0; in mipi_tx_drv_get_phy_clk_prepare() 266 temp1 = 0; /* 0 is the minimum */ in mipi_tx_drv_get_phy_clk_prepare() 269 if (((temp1 + 1) * INNER_PEROID - PREPARE_COMPENSATE * g_actual_phy_data_rate) /* temp + 1 is next level period */ in mipi_tx_drv_get_phy_clk_prepare() 289 unsigned char temp1; in mipi_tx_drv_get_phy_data_prepare() local 298 temp1 = temp0; in mipi_tx_drv_get_phy_data_prepare() 300 temp1 = 0; in mipi_tx_drv_get_phy_data_prepare() 304 (((temp1 + 1) * INNER_PEROID - PREPARE_COMPENSATE * g_actual_phy_data_rate) > in mipi_tx_drv_get_phy_data_prepare()
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/device/soc/hisilicon/common/platform/mipi_dsi/ |
H A D | mipi_tx_hi35xx.c | 193 unsigned char temp1; in MipiTxDrvGetPhyClkPrepare() local 201 temp1 = temp0; in MipiTxDrvGetPhyClkPrepare() 203 temp1 = 0; /* 0 is the minimum */ in MipiTxDrvGetPhyClkPrepare() 206 if (((temp1 + 1) * INNER_PEROID - PREPARE_COMPENSATE * g_actualPhyDataRate) > /* temp + 1 is next level period */ in MipiTxDrvGetPhyClkPrepare() 226 unsigned char temp1; in MipiTxDrvGetPhyDataPrepare() local 235 temp1 = temp0; in MipiTxDrvGetPhyDataPrepare() 237 temp1 = 0; in MipiTxDrvGetPhyDataPrepare() 241 (((temp1 + 1) * INNER_PEROID - PREPARE_COMPENSATE * g_actualPhyDataRate) > in MipiTxDrvGetPhyDataPrepare()
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/device/soc/rockchip/common/sdk_linux/scripts/ |
H A D | resource_tool.c | 327 uint32_t temp1, temp2; in sha256_process() local 365 temp1 = (h) + S3(e) + F1(e, f, g) + (K) + (x); \ in sha256_process() 367 d += temp1; \ in sha256_process() 368 h = temp1 + temp2; \ in sha256_process()
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/device/soc/rockchip/rk3588/kernel/scripts/ |
H A D | resource_tool.c | 336 uint32_t temp1, temp2; in sha256_process() local 376 temp1 = h + S3(e) + F1(e,f,g) + K + x; \ in sha256_process() 378 d += temp1; h = temp1 + temp2; \ in sha256_process()
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/device/board/hisilicon/hispark_aries/uboot/secureboot_release/ddr_init/drv/ |
H A D | ddr_training_impl.c | 1706 unsigned int temp1 = 0; in ddr_hw_training_ctl() local 1710 temp1 = ddr_read(base_phy + 0x2c); in ddr_hw_training_ctl() 1712 ddr_write(temp1 | 0x00004000 , base_phy + 0x2c); /* write dm disable */ in ddr_hw_training_ctl() 1715 ddr_write(temp1, base_phy + 0x2c); /* restore */ in ddr_hw_training_ctl()
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/device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/drv/ |
H A D | ddr_training_impl.c | 1705 unsigned int temp1 = 0; in ddr_hw_training_ctl() local 1709 temp1 = ddr_read(base_phy + 0x2c); in ddr_hw_training_ctl() 1711 ddr_write(temp1 | 0x00004000 , base_phy + 0x2c); /* write dm disable */ in ddr_hw_training_ctl() 1714 ddr_write(temp1, base_phy + 0x2c); /* restore */ in ddr_hw_training_ctl()
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