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Searched refs:pstate (Results 1 - 11 of 11) sorted by relevance

/device/soc/rockchip/common/sdk_linux/arch/arm64/kernel/
H A Dprocess.c230 u64 pstate = regs->pstate; in print_pstate() local
233 printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n", pstate, pstate & PSR_AA32_N_BIT ? 'N' : 'n', in print_pstate()
234 pstate & PSR_AA32_Z_BIT ? 'Z' : 'z', pstate & PSR_AA32_C_BIT ? 'C' : 'c', in print_pstate()
235 pstate & PSR_AA32_V_BIT ? 'V' : 'v', pstate & PSR_AA32_Q_BIT ? 'Q' : 'q', in print_pstate()
236 pstate in print_pstate()
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/device/soc/rockchip/common/vendor/drivers/staging/android/fiq_debugger/
H A Dfiq_debugger_arm64.c45 output->printf(output, " pc %016lx cpsr %08lx mode %s\n", regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc()
60 output->printf(output, " cpsr %08x (%s)\n", regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch32()
85 output->printf(output, " pc %016lx cpsr %08x (%s)\n", regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch64()
106 u32 pstate = READ_SPECIAL_REG(CurrentEl); in fiq_debugger_dump_allregs() local
107 bool in_el2 = (pstate & PSR_MODE_MASK) >= PSR_MODE_EL2t; in fiq_debugger_dump_allregs()
/device/soc/rockchip/rk3588/kernel/drivers/staging/android/fiq_debugger/
H A Dfiq_debugger_arm64.c41 regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc()
60 regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch32()
100 regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch64()
121 u32 pstate = READ_SPECIAL_REG(CurrentEl); in fiq_debugger_dump_allregs() local
122 bool in_el2 = (pstate & PSR_MODE_MASK) >= PSR_MODE_EL2t; in fiq_debugger_dump_allregs()
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.c880 struct drm_plane_state *pstate; in vop_hdr_atomic_check() local
897 pstate = drm_atomic_get_plane_state(state, plane); in vop_hdr_atomic_check()
898 if (IS_ERR(pstate)) { in vop_hdr_atomic_check()
899 return PTR_ERR(pstate); in vop_hdr_atomic_check()
901 vop_plane_state = to_vop_plane_state(pstate); in vop_hdr_atomic_check()
902 if (!pstate->fb) { in vop_hdr_atomic_check()
941 pstate = drm_atomic_get_plane_state(state, plane); in vop_hdr_atomic_check()
942 if (IS_ERR(pstate)) { in vop_hdr_atomic_check()
943 return PTR_ERR(pstate); in vop_hdr_atomic_check()
945 vop_plane_state = to_vop_plane_state(pstate); in vop_hdr_atomic_check()
1158 struct drm_plane_state *pstate; vop_csc_atomic_check() local
2367 struct vop_plane_state *pstate = to_vop_plane_state(state); vop_plane_info_dump() local
2585 vop_plane_line_bandwidth(struct drm_plane_state *pstate) vop_plane_line_bandwidth() argument
2650 struct drm_plane_state *pstate; vop_crtc_bandwidth() local
3160 struct drm_plane_state *pstate; vop_afbdc_atomic_check() local
3326 struct drm_plane_state *pstate; vop_crtc_atomic_check() local
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H A Drockchip_drm_vop2.c845 static inline bool vop2_plane_active(struct drm_plane_state *pstate) in vop2_plane_active() argument
847 if (!pstate || !pstate->fb) { in vop2_plane_active()
2339 struct drm_plane_state *pstate = &vpstate->base; in vop2_setup_csc_mode() local
2341 int is_input_yuv = is_yuv_support(pstate->fb->format->format); in vop2_setup_csc_mode()
3444 static int vop2_cluster_two_win_mode_check(struct drm_plane_state *pstate) in vop2_cluster_two_win_mode_check() argument
3446 struct drm_atomic_state *state = pstate->state; in vop2_cluster_two_win_mode_check()
3447 struct drm_plane *plane = pstate->plane; in vop2_cluster_two_win_mode_check()
3452 int actual_w = drm_rect_width(&pstate->src) >> 0x10; in vop2_cluster_two_win_mode_check()
3455 if (pstate in vop2_cluster_two_win_mode_check()
3487 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
3518 vop2_plane_splice_check(struct drm_plane *plane, struct drm_plane_state *pstate, struct drm_display_mode *mode) vop2_plane_splice_check() argument
3779 struct drm_plane_state *pstate = plane->state; vop2_plane_setup_color_key() local
3893 vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, struct drm_rect *dst, struct drm_plane_state *pstate) vop2_win_atomic_update() argument
4121 struct drm_plane_state *pstate = plane->state; vop2_plane_atomic_update() local
4270 struct drm_plane_state *pstate; rockchip_atomic_helper_update_plane() local
4328 struct drm_plane_state *pstate; rockchip_atomic_helper_disable_plane() local
4645 struct drm_plane_state *pstate = plane->state; vop2_plane_info_dump() local
4926 vop2_plane_line_bandwidth(struct drm_plane_state *pstate) vop2_plane_line_bandwidth() argument
4990 struct drm_plane_state *pstate; vop2_crtc_bandwidth() local
6257 struct drm_plane_state *pstate; vop2_setup_hdr10() local
6572 struct drm_plane_state *pstate; vop2_setup_alpha() local
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/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop2.c870 static inline bool vop2_plane_active(struct drm_plane_state *pstate) in vop2_plane_active() argument
872 if (!pstate || !pstate->fb) in vop2_plane_active()
2334 struct drm_plane_state *pstate = &vpstate->base; in vop2_setup_csc_mode() local
2336 int is_input_yuv = is_yuv_support(pstate->fb->format->format); in vop2_setup_csc_mode()
3445 static int vop2_cluster_two_win_mode_check(struct drm_plane_state *pstate) in vop2_cluster_two_win_mode_check() argument
3447 struct drm_atomic_state *state = pstate->state; in vop2_cluster_two_win_mode_check()
3448 struct drm_plane *plane = pstate->plane; in vop2_cluster_two_win_mode_check()
3453 int actual_w = drm_rect_width(&pstate->src) >> 16; in vop2_cluster_two_win_mode_check()
3456 if (pstate in vop2_cluster_two_win_mode_check()
3490 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
3525 vop2_plane_splice_check(struct drm_plane *plane, struct drm_plane_state *pstate, struct drm_display_mode *mode) vop2_plane_splice_check() argument
3786 struct drm_plane_state *pstate = plane->state; vop2_plane_setup_color_key() local
3896 vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, struct drm_rect *dst, struct drm_plane_state *pstate) vop2_win_atomic_update() argument
4119 struct drm_plane_state *pstate = plane->state; vop2_plane_atomic_update() local
4272 struct drm_plane_state *pstate; rockchip_atomic_helper_update_plane() local
4328 struct drm_plane_state *pstate; rockchip_atomic_helper_disable_plane() local
4647 struct drm_plane_state *pstate = plane->state; vop2_plane_info_dump() local
4937 vop2_plane_line_bandwidth(struct drm_plane_state *pstate) vop2_plane_line_bandwidth() argument
4999 struct drm_plane_state *pstate; vop2_crtc_bandwidth() local
6310 struct drm_plane_state *pstate; vop2_setup_hdr10() local
6611 struct drm_plane_state *pstate; vop2_setup_alpha() local
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/device/soc/rockchip/common/sdk_linux/drivers/opp/
H A Dof.c798 new_opp->pstate = pm_genpd_opp_to_performance_state(dev, new_opp); in _opp_add_static_v2()
890 if (opp->pstate) { in _of_add_opp_table_v2()
1206 int pstate = -EINVAL; in of_get_required_opp_performance_state() local
1221 pstate = opp->pstate; in of_get_required_opp_performance_state()
1230 return pstate; in of_get_required_opp_performance_state()
H A Ddebugfs.c121 debugfs_create_u32("performance_state", S_IRUGO, d, &opp->pstate); in opp_debug_create_one()
/device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/
H A Dopp.h59 * @pstate: Device's power domain's performance state.
81 unsigned int pstate; member
/device/soc/rockchip/common/vendor/drivers/firmware/
H A Drockchip_sip.c305 /* copy pstate: spsr_el3 */ in sip_fiq_debugger_get_pt_regs()
306 memcpy(&fiq_pt_regs.pstate, reg_base + 0x110, 0x8); in sip_fiq_debugger_get_pt_regs()
/device/soc/rockchip/rk3588/kernel/drivers/firmware/
H A Drockchip_sip.c308 /* copy pstate: spsr_el3 */ in sip_fiq_debugger_get_pt_regs()
309 memcpy(&fiq_pt_regs.pstate, reg_base + 0x110, 8); in sip_fiq_debugger_get_pt_regs()

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