Searched refs:mux_gpll_cpll_p (Results 1 - 3 of 3) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-rk1808.c | 125 PNAME(mux_gpll_cpll_p) = {"gpll", "cpll"}; variable
272 COMPOSITE(ACLK_GIC_PRE, "aclk_gic_pre", mux_gpll_cpll_p, CLK_IS_CRITICAL, RK1808_CLKSEL_CON(15), 11, 1, MFLAGS, 12,
280 COMPOSITE(0, "aclk_vpu_pre", mux_gpll_cpll_p, 0, RK1808_CLKSEL_CON(16), 7, 1, MFLAGS, 0, 5, DFLAGS,
292 COMPOSITE_NOGATE(0, "clk_npu_div", mux_gpll_cpll_p, CLK_OPS_PARENT_ENABLE, RK1808_CLKSEL_CON(1), 8, 2, MFLAGS, 0, 4,
294 COMPOSITE_NOGATE_HALFDIV(0, "clk_npu_np5", mux_gpll_cpll_p, CLK_OPS_PARENT_ENABLE, RK1808_CLKSEL_CON(1), 10, 2,
300 COMPOSITE(0, "aclk_npu_pre", mux_gpll_cpll_p, 0, RK1808_CLKSEL_CON(2), 14, 1, MFLAGS, 0, 4, DFLAGS,
302 COMPOSITE(0, "hclk_npu_pre", mux_gpll_cpll_p, 0, RK1808_CLKSEL_CON(2), 15, 1, MFLAGS, 8, 4, DFLAGS,
313 COMPOSITE(ACLK_IMEM_PRE, "aclk_imem_pre", mux_gpll_cpll_p, CLK_IS_CRITICAL, RK1808_CLKSEL_CON(17), 7, 1, MFLAGS, 0,
324 COMPOSITE(HSCLK_IMEM, "hsclk_imem", mux_gpll_cpll_p, CLK_IS_CRITICAL, RK1808_CLKSEL_CON(17), 15, 1, MFLAGS, 8, 5,
360 COMPOSITE(HSCLK_VIO, "hsclk_vio", mux_gpll_cpll_p,
[all...] |
| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-px30.c | 112 PNAME(mux_gpll_cpll_p) = {"gpll", "dummy_cpll"}; variable
338 COMPOSITE_NODIV(ACLK_PERI_SRC, "aclk_peri_src", mux_gpll_cpll_p, CLK_IS_CRITICAL, PX30_CLKSEL_CON(14), 15, 1,
367 COMPOSITE(SCLK_SFC, "clk_sfc", mux_gpll_cpll_p, 0, PX30_CLKSEL_CON(22), 7, 1, MFLAGS, 0, 7, DFLAGS,
415 COMPOSITE_NODIV(ACLK_BUS_SRC, "aclk_bus_src", mux_gpll_cpll_p, CLK_IS_CRITICAL, PX30_CLKSEL_CON(23), 15, 1, MFLAGS,
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| H A D | clk-rk3328.c | 141 PNAME(mux_gpll_cpll_p) = {"gpll", "cpll"}; variable
429 COMPOSITE(DCLK_LCDC_SRC, "dclk_lcdc_src", mux_gpll_cpll_p, 0, RK3328_CLKSEL_CON(40), 0, 1, MFLAGS, 8, 8, DFLAGS,
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Completed in 6 milliseconds