Searched refs:mux_gpll_cpll_npll_p (Results 1 - 2 of 2) sorted by relevance
| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-px30.c | 115 PNAME(mux_gpll_cpll_npll_p) = {"gpll", "dummy_cpll", "dummy_npll"}; variable
288 COMPOSITE(ACLK_VI_PRE, "aclk_vi_pre", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 5, DFLAGS,
292 COMPOSITE(SCLK_ISP, "clk_isp", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 5, DFLAGS,
304 COMPOSITE(ACLK_VO_PRE, "aclk_vo_pre", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(3), 6, 2, MFLAGS, 0, 5, DFLAGS,
310 COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(4), 6, 2, MFLAGS, 0, 5, DFLAGS,
327 COMPOSITE(0, "aclk_vpu_pre", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(10), 6, 2, MFLAGS, 0, 5, DFLAGS,
331 COMPOSITE(SCLK_CORE_VPU, "sclk_core_vpu", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(13), 14, 2, MFLAGS, 8, 5, DFLAGS,
346 COMPOSITE(SCLK_NANDC_DIV, "clk_nandc_div", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(15), 6, 2, MFLAGS, 0, 5, DFLAGS,
348 COMPOSITE(SCLK_NANDC_DIV50, "clk_nandc_div50", mux_gpll_cpll_npll_p, 0, PX30_CLKSEL_CON(15), 6, 2, MFLAGS, 8, 5,
393 COMPOSITE(SCLK_GMAC_SRC, "clk_gmac_src", mux_gpll_cpll_npll_p,
[all...] |
| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-rk1808.c | 130 PNAME(mux_gpll_cpll_npll_p) = {"gpll", "cpll", "npll"}; variable
395 COMPOSITE(SCLK_RGA, "clk_rga", mux_gpll_cpll_npll_p, 0, RK1808_CLKSEL_CON(10), 6, 2, MFLAGS, 0, 5, DFLAGS,
398 COMPOSITE(SCLK_ISP, "clk_isp", mux_gpll_cpll_npll_p, 0, RK1808_CLKSEL_CON(10), 14, 2, MFLAGS, 8, 5, DFLAGS,
719 COMPOSITE(SCLK_I2S0_8CH_TX_SRC, "clk_i2s0_8ch_tx_src", mux_gpll_cpll_npll_p, 0, RK1808_CLKSEL_CON(32), 8, 2, MFLAGS,
728 COMPOSITE(SCLK_I2S0_8CH_RX_SRC, "clk_i2s0_8ch_rx_src", mux_gpll_cpll_npll_p, 0, RK1808_CLKSEL_CON(34), 8, 2, MFLAGS,
737 COMPOSITE(SCLK_I2S1_2CH_SRC, "clk_i2s1_2ch_src", mux_gpll_cpll_npll_p, 0, RK1808_CLKSEL_CON(36), 8, 2, MFLAGS, 0, 7,
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Completed in 4 milliseconds