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/device/soc/rockchip/common/sdk_linux/include/trace/events/
H A Dcpuhp.h12 TP_PROTO(unsigned int cpu, int target, int idx, int (*fun)(unsigned int)),
14 TP_ARGS(cpu, target, idx, fun),
16 TP_STRUCT__entry(__field(unsigned int, cpu) __field(int, target) __field(int, idx) __field(void *, fun)),
18 TP_fast_assign(__entry->cpu = cpu; __entry->target = target; __entry->idx = idx; __entry->fun = fun;),
20 TP_printk("cpu: %04u target: %3d step: %3d (%ps)", __entry->cpu, __entry->target, __entry->idx,
25 TP_PROTO(unsigned int cpu, int target, int idx, int (*fun)(unsigned int, struct hlist_node *),
28 TP_ARGS(cpu, target, idx, fun, node),
30 TP_STRUCT__entry(__field(unsigned int, cpu) __field(int, target) __field(int, idx) __field(void *, fun)),
32 TP_fast_assign(__entry->cpu = cpu; __entry->target = target; __entry->idx
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/device/qemu/SmartL_E802/liteos_m/board/hals/csky_driver/src/
H A Ddevices.c41 uint16_t cfg_idx; //idx of sg_usart_config[]
52 \param[in] instance idx, must not exceed return value of target_get_usart_count()
56 int32_t target_usart_init(int32_t idx, uint32_t *base, uint32_t *irq) in target_usart_init() argument
58 if (idx >= sizeof(s_usart_pin_map) / sizeof(usart_pin_map_t)) { in target_usart_init()
62 *base = sg_usart_config[s_usart_pin_map[idx].cfg_idx].base; in target_usart_init()
63 *irq = sg_usart_config[s_usart_pin_map[idx].cfg_idx].irq; in target_usart_init()
64 return s_usart_pin_map[idx].cfg_idx; in target_usart_init()
84 int32_t target_get_timer(int32_t idx, uint32_t *base, uint32_t *irq) in target_get_timer() argument
86 if (idx >= target_get_timer_count()) { in target_get_timer()
90 *base = sg_timer_config[idx] in target_get_timer()
150 uint32_t idx; target_gpio_pin_init() local
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H A Dck_usart.c69 int32_t idx; member
72 extern int32_t target_usart_init(int32_t idx, uint32_t *base, uint32_t *irq);
73 extern int32_t target_usart_flowctrl_init(int32_t idx, uint32_t flag);
313 void ck_usart_intr_threshold_empty(int32_t idx, ck_usart_priv_t *usart_priv) in ck_usart_intr_threshold_empty() argument
339 usart_priv->cb_event(idx, USART_EVENT_SEND_COMPLETE); in ck_usart_intr_threshold_empty()
359 static void ck_usart_intr_recv_data(int32_t idx, ck_usart_priv_t *usart_priv) in ck_usart_intr_recv_data() argument
376 usart_priv->cb_event(idx, USART_EVENT_RECEIVE_COMPLETE); in ck_usart_intr_recv_data()
386 static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv) in ck_usart_intr_recv_line() argument
401 usart_priv->cb_event(idx, USART_EVENT_RX_TIMEOUT); in ck_usart_intr_recv_line()
413 usart_priv->cb_event(idx, USART_EVENT_RX_BREA in ck_usart_intr_recv_line()
462 ck_usart_intr_char_timeout(int32_t idx, ck_usart_priv_t *usart_priv) ck_usart_intr_char_timeout() argument
495 ck_usart_irqhandler(int32_t idx) ck_usart_irqhandler() argument
530 csi_usart_get_capabilities(int32_t idx) csi_usart_get_capabilities() argument
547 csi_usart_initialize(int32_t idx, usart_event_cb_t cb_event) csi_usart_initialize() argument
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H A Ddw_gpio.c58 uint8_t idx; member
141 uint32_t offset = gpio_pin_priv->idx; in gpio_set_irq_mode()
187 static void gpio_irq_clear(gpio_pin_handle_t pin, uint32_t idx) in gpio_irq_clear() argument
196 gpio_control_reg->PORTA_EOI = idx; in gpio_irq_clear()
214 uint32_t offset = gpio_pin_priv->idx; in gpio_irq_enable()
231 uint32_t offset = gpio_pin_priv->idx; in gpio_irq_disable()
242 void dw_gpio_irqhandler(int idx) in dw_gpio_irqhandler() argument
244 if (idx >= CONFIG_GPIO_NUM) { in dw_gpio_irqhandler()
248 dw_gpio_control_reg_t *gpio_control_reg = (dw_gpio_control_reg_t *)(gpio_handle[idx].base + 0x30); in dw_gpio_irqhandler()
261 if (idx > in dw_gpio_irqhandler()
298 int32_t idx = target_gpio_port_init(port, &base, &irq, &pin_num); csi_gpio_port_initialize() local
481 int32_t idx = pin_idx; csi_gpio_pin_initialize() local
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H A Ddw_timer.c50 extern int32_t target_get_timer(int32_t idx, uint32_t *base, uint32_t *irq);
65 void dw_timer_irqhandler(int idx) in dw_timer_irqhandler() argument
67 dw_timer_priv_t *timer_priv = &timer_instance[idx]; in dw_timer_irqhandler()
75 return timer_priv->cb_event(idx, TIMER_EVENT_TIMEOUT); in dw_timer_irqhandler()
109 \param[in] idx instance timer index
113 timer_handle_t csi_timer_initialize(int32_t idx, timer_event_cb_t cb_event) in csi_timer_initialize() argument
115 if (idx < 0 || idx >= CONFIG_TIMER_NUM) { in csi_timer_initialize()
122 int32_t real_idx = target_get_timer(idx, &base, &irq); in csi_timer_initialize()
124 if (real_idx != idx) { in csi_timer_initialize()
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/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/
H A Ddhd_flowring.h78 #define DHD_IF_ROLE(pub, idx) (((if_flow_lkup_t *)(pub)->if_flow_lkup)[idx].role)
79 #define DHD_IF_ROLE_AP(pub, idx) (DHD_IF_ROLE(pub, idx) == WLC_E_IF_ROLE_AP)
80 #define DHD_IF_ROLE_STA(pub, idx) (DHD_IF_ROLE(pub, idx) == WLC_E_IF_ROLE_STA)
81 #define DHD_IF_ROLE_P2PGC(pub, idx) (DHD_IF_ROLE(pub, idx) == WLC_E_IF_ROLE_P2P_CLIENT)
82 #define DHD_IF_ROLE_P2PGO(pub, idx) (DHD_IF_ROLE(pub, idx)
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H A Ddhd_flowring.c317 uint32 idx; in dhd_flow_rings_init() local
349 for (idx = 0; idx < num_flow_rings; idx++) { in dhd_flow_rings_init()
350 flow_ring_table[idx].status = FLOW_RING_STATUS_CLOSED; in dhd_flow_rings_init()
351 flow_ring_table[idx].flowid = (uint16)idx; in dhd_flow_rings_init()
352 flow_ring_table[idx].lock = dhd_os_spin_lock_init(dhdp->osh); in dhd_flow_rings_init()
354 flow_ring_table[idx].last_active_ts = OSL_SYSUPTIME(); in dhd_flow_rings_init()
356 if (flow_ring_table[idx] in dhd_flow_rings_init()
441 uint16 idx; dhd_flow_rings_deinit() local
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H A Dwl_linux_mon.c288 int idx = -1; in dhd_add_monitor() local
307 idx = i; in dhd_add_monitor()
310 if (idx == -1) { in dhd_add_monitor()
335 g_monitor.mon_if[idx].radiotap_enabled = TRUE; in dhd_add_monitor()
336 g_monitor.mon_if[idx].mon_ndev = ndev; in dhd_add_monitor()
337 g_monitor.mon_if[idx].real_ndev = lookup_real_netdev(name); in dhd_add_monitor()
342 MON_PRINT("found a matched net device, name %s\n", g_monitor.mon_if[idx].real_ndev->name); in dhd_add_monitor()
356 int idx = -1; in magiclink_add_p2p() local
374 idx = i; in magiclink_add_p2p()
377 if (idx in magiclink_add_p2p()
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/device/soc/rockchip/rk2206/sdk_liteos/platform/system/
H A Dprintf.c119 typedef void (*out_fct_type)(char character, void* buffer, size_t idx, size_t maxlen);
128 static inline void _out_buffer(char character, void* buffer, size_t idx, size_t maxlen) in _out_buffer() argument
130 if (idx < maxlen) { in _out_buffer()
131 ((char*)buffer)[idx] = character; in _out_buffer()
136 static inline void _out_null(char character, void* buffer, size_t idx, size_t maxlen) in _out_null() argument
140 (void)idx; in _out_null()
150 static inline void _out_char(char character, void* buffer, size_t idx, size_t maxlen) in _out_char() argument
153 (void)idx; in _out_char()
162 static inline void _out_fct(char character, void* buffer, size_t idx, size_t maxlen) in _out_fct() argument
164 (void)idx; in _out_fct()
209 size_t idx = buffer_idx; _out_rev() local
237 _ntoa_format(out_fct_type out, char* buffer, size_t idx, size_t maxlen, char* buf, size_t buf_len, bool negative, unsigned int base, unsigned int prec, unsigned int prec_width, unsigned int flags) _ntoa_format() argument
292 _ntoa_long(out_fct_type out, char* buffer, size_t idx, size_t maxlen, unsigned long l_value, bool negative, unsigned long base, unsigned int prec, unsigned int width, unsigned int l_flags) _ntoa_long() argument
328 _ntoa_long_long(out_fct_type out, char* buffer, size_t idx, size_t maxlen, unsigned long long l_value, bool negative, unsigned long long base, unsigned int prec, unsigned int width, unsigned int l_flags) _ntoa_long_long() argument
381 _ftoa(out_fct_type out, char* buffer, size_t idx, size_t maxlen, double d_value, unsigned int i_prec, unsigned int i_width, unsigned int flags) _ftoa() argument
533 _etoa(out_fct_type out, char* buffer, size_t idx, size_t maxlen, double value, unsigned int prec, unsigned int width, unsigned int flags) _etoa() argument
689 size_t idx = 0U; vsnprintf_s() local
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_jm_rb.c113 int idx) in kbase_gpu_inspect()
119 if ((SLOT_RB_ENTRIES(rb) - 1) < idx) in kbase_gpu_inspect()
120 return NULL; /* idx out of range */ in kbase_gpu_inspect()
122 return rb->entries[(rb->read_idx + idx) & SLOT_RB_MASK].katom; in kbase_gpu_inspect()
481 struct kbase_jd_atom **katom, int idx, int js) in kbase_jm_protected_entry()
512 katom[idx]->event_code = BASE_JD_EVENT_JOB_INVALID; in kbase_jm_protected_entry()
513 kbase_gpu_mark_atom_for_return(kbdev, katom[idx]); in kbase_jm_protected_entry()
519 if (idx == 0 || katom[0]->gpu_rb_state == in kbase_jm_protected_entry()
522 kbase_jm_return_atom_to_js(kbdev, katom[idx]); in kbase_jm_protected_entry()
532 kbase_jd_katom_is_protected(katom[idx]) in kbase_jm_protected_entry()
112 kbase_gpu_inspect(struct kbase_device *kbdev, int js, int idx) kbase_gpu_inspect() argument
480 kbase_jm_protected_entry(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_protected_entry() argument
543 kbase_jm_enter_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_enter_protected_mode() argument
718 kbase_jm_exit_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_exit_protected_mode() argument
839 int idx; kbase_backend_slot_update() local
1391 int idx; kbase_backend_reset() local
1819 int idx; kbase_gpu_dump_slots() local
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_jm_rb.c106 struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, int js, int idx) in kbase_gpu_inspect() argument
112 if ((SLOT_RB_ENTRIES(rb) - 1) < idx) { in kbase_gpu_inspect()
113 return NULL; /* idx out of range */ in kbase_gpu_inspect()
116 return rb->entries[(rb->read_idx + idx) & SLOT_RB_MASK].katom; in kbase_gpu_inspect()
447 static int kbase_jm_protected_entry(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) in kbase_jm_protected_entry() argument
477 katom[idx]->event_code = BASE_JD_EVENT_JOB_INVALID; in kbase_jm_protected_entry()
478 kbase_gpu_mark_atom_for_return(kbdev, katom[idx]); in kbase_jm_protected_entry()
484 if (idx == 0 || katom[0]->gpu_rb_state == KBASE_ATOM_GPU_RB_NOT_IN_SLOT_RB) { in kbase_jm_protected_entry()
486 kbase_jm_return_atom_to_js(kbdev, katom[idx]); in kbase_jm_protected_entry()
495 KBASE_DEBUG_ASSERT_MSG(kbase_jd_katom_is_protected(katom[idx]) in kbase_jm_protected_entry()
503 kbase_jm_enter_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_enter_protected_mode() argument
671 kbase_jm_exit_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_exit_protected_mode() argument
778 int idx; global() local
1174 int idx; global() local
1471 int idx; global() local
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/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/mac/hmac/
H A Dhmac_uapsd.c85 hi_void hmac_uapsd_set_info(const hi_u8 *puc_mac_hdr, const hmac_user_stru *hmac_user, hi_u8 uapsd_flag, hi_u32 idx, in hmac_uapsd_set_info() argument
89 hi_u8 max_sp = (puc_mac_hdr[idx + HMAC_UAPSD_WME_LEN] >> 5) & 0x3; /* 右移5位 */ in hmac_uapsd_set_info()
153 hi_u32 idx = MAC_CAP_INFO_LEN + MAC_LIS_INTERVAL_IE_LEN; in hmac_uapsd_update_user_para() local
155 idx += WLAN_MAC_ADDR_LEN; in hmac_uapsd_update_user_para()
157 while (idx < msg_len) { in hmac_uapsd_update_user_para()
158 if (HI_TRUE != mac_is_wmm_ie((puc_mac_hdr + idx))) { in hmac_uapsd_update_user_para()
159 idx += (MAC_IE_HDR_LEN + puc_mac_hdr[(idx + 1)]); in hmac_uapsd_update_user_para()
172 uapsd_status.qos_info = puc_mac_hdr[idx + HMAC_UAPSD_WME_LEN]; in hmac_uapsd_update_user_para()
175 if (BIT0 == (puc_mac_hdr[idx in hmac_uapsd_update_user_para()
[all...]
H A Dhmac_encap_frame_sta.c51 hi_u8 idx; in hmac_set_supported_rates_ie_asoc_req() local
70 for (idx = 0; idx < nrates; idx++) { in hmac_set_supported_rates_ie_asoc_req()
71 puc_buffer[MAC_IE_HDR_LEN + idx] = hmac_vap->auc_supp_rates[idx]; in hmac_set_supported_rates_ie_asoc_req()
92 hi_u8 idx; in hmac_set_exsup_rates_ie_asoc_req() local
110 for (idx = 0; idx < nrates; idx in hmac_set_exsup_rates_ie_asoc_req()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_jm_rb.c100 struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, int js, int idx) in kbase_gpu_inspect() argument
106 if ((SLOT_RB_ENTRIES(rb) - 1) < idx) { in kbase_gpu_inspect()
107 return NULL; /* idx out of range */ in kbase_gpu_inspect()
110 return rb->entries[(rb->read_idx + idx) & SLOT_RB_MASK].katom; in kbase_gpu_inspect()
728 static int kbase_jm_enter_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) in kbase_jm_enter_protected_mode() argument
732 switch (katom[idx]->protected_state.enter) { in kbase_jm_enter_protected_mode()
742 katom[idx]->protected_state.enter = KBASE_ATOM_ENTER_PROTECTED_VINSTR; in kbase_jm_enter_protected_mode()
768 katom[idx]->protected_state.enter = KBASE_ATOM_ENTER_PROTECTED_IDLE_L2; in kbase_jm_enter_protected_mode()
787 katom[idx]->protected_state.enter = KBASE_ATOM_ENTER_PROTECTED_FINISHED; in kbase_jm_enter_protected_mode()
808 katom[idx] in kbase_jm_enter_protected_mode()
834 kbase_jm_exit_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_exit_protected_mode() argument
922 int idx; kbase_backend_slot_update() local
1326 int idx; kbase_backend_reset() local
1689 int idx; kbase_gpu_dump_slots() local
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_jm_rb.c108 int idx) in kbase_gpu_inspect()
114 if ((SLOT_RB_ENTRIES(rb) - 1) < idx) in kbase_gpu_inspect()
115 return NULL; /* idx out of range */ in kbase_gpu_inspect()
117 return rb->entries[(rb->read_idx + idx) & SLOT_RB_MASK].katom; in kbase_gpu_inspect()
818 struct kbase_jd_atom **katom, int idx, int js) in kbase_jm_enter_protected_mode()
822 switch (katom[idx]->protected_state.enter) { in kbase_jm_enter_protected_mode()
832 katom[idx]->protected_state.enter = in kbase_jm_enter_protected_mode()
859 katom[idx]->protected_state.enter = in kbase_jm_enter_protected_mode()
879 katom[idx]->protected_state.enter = in kbase_jm_enter_protected_mode()
901 katom[idx] in kbase_jm_enter_protected_mode()
107 kbase_gpu_inspect(struct kbase_device *kbdev, int js, int idx) kbase_gpu_inspect() argument
817 kbase_jm_enter_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_enter_protected_mode() argument
932 kbase_jm_exit_protected_mode(struct kbase_device *kbdev, struct kbase_jd_atom **katom, int idx, int js) kbase_jm_exit_protected_mode() argument
1027 int idx; kbase_backend_slot_update() local
1505 int idx; kbase_backend_reset() local
1931 int idx; kbase_gpu_dump_slots() local
[all...]
/device/soc/rockchip/common/sdk_linux/ipc/
H A Dutil.c203 int idx, next_id = -1; in ipc_idr_alloc() local
228 /* allocate the idx, with a NULL struct kern_ipc_perm */ in ipc_idr_alloc()
229 idx = idr_alloc_cyclic(&ids->ipcs_idr, NULL, 0, max_idx, GFP_NOWAIT); in ipc_idr_alloc()
230 if (idx >= 0) { in ipc_idr_alloc()
232 * idx got allocated successfully. in ipc_idr_alloc()
236 if (idx <= ids->last_idx) { in ipc_idr_alloc()
242 ids->last_idx = idx; in ipc_idr_alloc()
249 idr_replace(&ids->ipcs_idr, new, idx); in ipc_idr_alloc()
253 idx = idr_alloc(&ids->ipcs_idr, new, ipcid_to_idx(next_id), 0, GFP_NOWAIT); in ipc_idr_alloc()
255 if (idx > in ipc_idr_alloc()
280 int idx, err; ipc_addid() local
466 int idx = ipcid_to_idx(ipcp->id); ipc_rmid() local
600 int idx = ipcid_to_idx(id); ipc_obtain_object_idr() local
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/device/qemu/riscv32_virt/liteos_m/board/driver/
H A Dvirtgpu.c208 uint16_t idx = 0; in RequestResponse() local
211 q->desc[idx].pAddr = u32_to_u64(VMM_TO_DMA_ADDR((VADDR_T)req)); in RequestResponse()
212 q->desc[idx].len = reqSize; in RequestResponse()
213 q->desc[idx].flag = VIRTQ_DESC_F_NEXT; in RequestResponse()
214 q->desc[idx].next = idx + 1; in RequestResponse()
215 idx++; in RequestResponse()
216 q->desc[idx].pAddr = u32_to_u64(VMM_TO_DMA_ADDR((VADDR_T)resp)); in RequestResponse()
217 q->desc[idx].len = respSize; in RequestResponse()
218 q->desc[idx] in RequestResponse()
227 uint16_t idx = 0; RequestDataResponse() local
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/device/qemu/drivers/virtio/
H A Dvirtgpu.c207 uint16_t idx = 0; in RequestResponse() local
210 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)req); in RequestResponse()
211 q->desc[idx].len = reqSize; in RequestResponse()
212 q->desc[idx].flag = VIRTQ_DESC_F_NEXT; in RequestResponse()
213 q->desc[idx].next = idx + 1; in RequestResponse()
214 idx++; in RequestResponse()
215 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)resp); in RequestResponse()
216 q->desc[idx].len = respSize; in RequestResponse()
217 q->desc[idx] in RequestResponse()
226 uint16_t idx = 0; RequestDataResponse() local
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/csf/
H A Dmali_kbase_csf_kcpu_debugfs.c129 unsigned long idx; in kbasep_csf_kcpu_debugfs_show() local
135 idx = find_first_bit(kctx->csf.kcpu_queues.in_use, in kbasep_csf_kcpu_debugfs_show()
138 while (idx < KBASEP_MAX_KCPU_QUEUES) { in kbasep_csf_kcpu_debugfs_show()
140 kctx->csf.kcpu_queues.array[idx]; in kbasep_csf_kcpu_debugfs_show()
142 seq_printf(file, "%9lu( %s ), ", idx, in kbasep_csf_kcpu_debugfs_show()
145 kctx->csf.kcpu_queues.array[idx]); in kbasep_csf_kcpu_debugfs_show()
147 idx = find_next_bit(kctx->csf.kcpu_queues.in_use, in kbasep_csf_kcpu_debugfs_show()
148 KBASEP_MAX_KCPU_QUEUES, idx + 1); in kbasep_csf_kcpu_debugfs_show()
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/wal/
H A Dwal_customize.c58 hi_s32 idx; in init_int_to_str_for_country_code() local
63 idx = (country_codeval / 26 > 0) ? (country_codeval / 26 - 1) : 0; /* 26个英文字母 */ in init_int_to_str_for_country_code()
64 if (idx >= 0) { in init_int_to_str_for_country_code()
65 country_code[0] = cuntry_char[idx]; in init_int_to_str_for_country_code()
70 idx = (country_codeval % 26 > 0) ? (country_codeval % 26 - 1) : 0; /* 26个英文字母 */ in init_int_to_str_for_country_code()
71 if (idx >= 0) { in init_int_to_str_for_country_code()
72 country_code[1] = cuntry_char[idx]; in init_int_to_str_for_country_code()
810 hi_u8 idx, level; in wal_customize_init_rf() local
818 for (idx = 0; idx < MAC_NUM_2G_BAN in wal_customize_init_rf()
883 hi_u8 idx = 0; wal_customize_init_dts_cali() local
910 hi_u8 idx = 0; wal_customize_init_band_edge_limit() local
1023 hi_u8 idx; wal_customize_init_dbb() local
1069 hi_u8 idx; wal_customize_init_fcc_tx_pwr() local
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/usr/sensor/omnivision_ov9284/
H A Dov9284_sensor_ctl.c93 HI_U32 idx = 0; in ov9284_write_register() local
102 buf[idx] = (addr >> 8) & 0xff; /* shift 8 */ in ov9284_write_register()
103 idx++; in ov9284_write_register()
104 buf[idx] = addr & 0xff; in ov9284_write_register()
105 idx++; in ov9284_write_register()
107 buf[idx] = addr & 0xff; in ov9284_write_register()
108 idx++; in ov9284_write_register()
112 buf[idx] = (data >> 8) & 0xff; /* shift 8 */ in ov9284_write_register()
113 idx++; in ov9284_write_register()
114 buf[idx] in ov9284_write_register()
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/lwip_sack/include/lwip/
H A Dsntp.h57 void sntp_setserver(u8_t idx, const ip_addr_t *addr);
58 const ip_addr_t *sntp_getserver(u8_t idx);
61 void sntp_setservername(u8_t idx, char *server);
62 char *sntp_getservername(u8_t idx);
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/mac/common/
H A Dmac_regdomain.c179 hi_void mac_get_channel_num_from_idx(hi_u8 band, hi_u8 idx, hi_u8 *puc_channel_num) in mac_get_channel_num_from_idx() argument
182 if (idx >= MAC_CHANNEL_FREQ_2_BUTT) { in mac_get_channel_num_from_idx()
185 *puc_channel_num = g_ast_channel_list_2g[idx].chan_number; in mac_get_channel_num_from_idx()
200 hi_u8 idx; in mac_get_channel_idx_from_num() local
212 for (idx = 0; idx < total_channel_num; idx++) { in mac_get_channel_idx_from_num()
213 if (channel[idx].chan_number == channel_num) { in mac_get_channel_idx_from_num()
214 *puc_channel_idx = idx; in mac_get_channel_idx_from_num()
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/oal/
H A Dplat_firmware.c1197 hi_s32 idx; in firmware_write_cfg() local
1202 for (idx = 0; idx < CFG_CMD_NUM_MAX; ++idx) { in firmware_write_cfg()
1203 if (strcmp((const hi_char *)key, (const hi_char *)g_cus_cfg_cmd[idx].cmd_name) == 0) { in firmware_write_cfg()
1207 if (idx == CFG_CMD_NUM_MAX) { in firmware_write_cfg()
1212 if (len > g_cus_cfg_cmd[idx].val_len - 3) { /* 3:预留的 ‘;’和“\r\n”的大小 */ in firmware_write_cfg()
1213 printk("new val [%s] length exceeds old val [%s]\n", new_val, g_cus_cfg_cmd[idx].cmd_para); in firmware_write_cfg()
1222 l_ret = oal_file_lseek(fp, g_cus_cfg_cmd[idx].val_offset, OAL_SEEK_SET); in firmware_write_cfg()
1223 hi_u8 *buf = (hi_u8 *)OS_KMALLOC_GFP(g_cus_cfg_cmd[idx] in firmware_write_cfg()
1863 hi_u8 idx = 0; parse_mac_addr() local
1945 get_cfg_idx(const hi_char *cfg_name, hi_u8 *idx) get_cfg_idx() argument
1960 hi_u8 idx; cfg_get_mac() local
1974 hi_u8 idx; cfg_dbb() local
1997 hi_u8 idx; cfg_country_code() local
2016 hi_u8 idx; cfg_tx_pwr_offset() local
2039 hi_u8 idx; cfg_freq_comp_val() local
2064 hi_u8 idx; cfg_rssi_ofset() local
[all...]
/device/board/hihope/dayu210/camera/vdi_impl/v4l2/pipeline_core/src/node/
H A Drk_codec_node.cpp222 int idx = 0; in encodeJpegToMemory() local
224 yuvBuf[idx++] = yBase[i + j * width]; in encodeJpegToMemory()
225 yuvBuf[idx++] = uBase[j / AlgoPara * width + (i / AlgoPara) * AlgoPara]; in encodeJpegToMemory()
226 yuvBuf[idx++] = uBase[j / AlgoPara * width + (i / AlgoPara) * AlgoPara + 1]; in encodeJpegToMemory()
271 size_t idx = 0; in SerchIFps() local
281 int ret = findStartCode(buf + idx, size); in SerchIFps()
283 idx += 1; in SerchIFps()
286 nalType = ((buf[idx + ret]) & nalBit); in SerchIFps()
287 CAMERA_LOGI("ForkNode::ForkBuffers nalu == 0x%{public}x buf == 0x%{public}x \n", nalType, buf[idx + ret]); in SerchIFps()
293 idx in SerchIFps()
[all...]

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