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Searched refs:get_parent (Results 1 - 6 of 6) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-ddr.c109 .get_parent = rockchip_ddrclk_get_parent,
158 .get_parent = rockchip_ddrclk_get_parent,
215 .get_parent = rockchip_ddrclk_get_parent,
H A Dclk-pll.c506 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3036_pll_set_params()
720 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3066_pll_set_params()
962 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3399_pll_set_params()
H A Dclk.c140 frac->rate_change_idx = frac->mux_ops->get_parent(&frac_mux->hw); in rockchip_clk_frac_notifier_cb()
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_clk.c184 .get_parent = vop2_mux_get_parent,
/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_clk.c202 .get_parent = vop2_mux_get_parent,
/device/soc/rockchip/common/sdk_linux/include/linux/
H A Dclk-provider.h140 * @get_parent: Queries the hardware to determine the parent of a clock. The
235 u8 (*get_parent)(struct clk_hw *hw); member
736 * Clock with multiple selectable parents. Implements .get_parent, .set_parent
747 * .get_parent clk_op.

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