| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk.c | 134 struct rockchip_clk_frac *frac = to_rockchip_clk_frac_nb(nb); in rockchip_clk_frac_notifier_cb() local
135 struct clk_mux *frac_mux = &frac->mux; in rockchip_clk_frac_notifier_cb()
140 frac->rate_change_idx = frac->mux_ops->get_parent(&frac_mux->hw); in rockchip_clk_frac_notifier_cb()
141 if (frac->rate_change_idx != frac->mux_frac_idx) { in rockchip_clk_frac_notifier_cb()
142 frac->mux_ops->set_parent(&frac_mux->hw, frac->mux_frac_idx); in rockchip_clk_frac_notifier_cb()
143 frac->rate_change_remuxed = 1; in rockchip_clk_frac_notifier_cb()
152 if (frac in rockchip_clk_frac_notifier_cb()
229 struct rockchip_clk_frac *frac; rockchip_clk_register_frac_branch() local
[all...] |
| H A D | clk-pll.c | 225 rate_table->frac = 0; in rockchip_pll_clk_set_by_auto()
228 "fin = %lu, fout = %lu, clk_gcd = %lu, refdiv = %u, fbdiv = %u, postdiv1 = %u, postdiv2 = %u, frac = %u\n", in rockchip_pll_clk_set_by_auto()
230 rate_table->frac); in rockchip_pll_clk_set_by_auto()
232 pr_debug("frac div running, fin_hz = %lu, fout_hz = %lu, fin_INT_mhz = %lu, fout_INT_mhz = %lu\n", fin_hz, in rockchip_pll_clk_set_by_auto()
234 pr_debug("frac get postdiv1 = %u, postdiv2 = %u, foutvco = %u\n", rate_table->postdiv1, rate_table->postdiv2, in rockchip_pll_clk_set_by_auto()
239 pr_debug("frac get refdiv = %u, fbdiv = %u\n", rate_table->refdiv, rate_table->fbdiv); in rockchip_pll_clk_set_by_auto()
241 rate_table->frac = 0; in rockchip_pll_clk_set_by_auto()
248 rate_table->frac = (u32)frac_64; in rockchip_pll_clk_set_by_auto()
249 if (rate_table->frac > 0) { in rockchip_pll_clk_set_by_auto()
252 pr_debug("frac in rockchip_pll_clk_set_by_auto()
1120 static u32 frac, fbdiv; rockchip_pll_clk_compensation() local
[all...] |
| H A D | clk.h | 288 .dsmpd = (_dsmpd), .frac = (_frac), \
339 unsigned int frac; member
|
| /device/soc/rockchip/rk2206/sdk_liteos/platform/system/ |
| H A D | printf.c | 455 unsigned long frac = (unsigned long)tmp; in _ftoa() local
456 diff = tmp - frac; in _ftoa()
459 ++frac; in _ftoa()
461 if (frac >= pow10[prec]) { in _ftoa()
462 frac = 0; in _ftoa()
466 } else if ((frac == 0U) || (frac & 1U)) { in _ftoa()
468 ++frac; in _ftoa()
483 buf[len++] = (char)(ascii_0 + (frac % num_count)); in _ftoa()
484 if (!(frac / in _ftoa()
[all...] |
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/hal/ |
| H A D | vou_drv.c | 67 /* PLL frac precision */
563 (pll->frac > VO_PLL_FRAC_MAX) || in vo_drv_check_dev_pll_param()
570 vo_err_trace("dev(%d) pll param (fbdiv,frac,refdiv,postdiv1,postdiv2)=" in vo_drv_check_dev_pll_param()
572 dev, pll->fbdiv, pll->frac, pll->refdiv, pll->postdiv1, pll->postdiv2); in vo_drv_check_dev_pll_param()
596 foutcvo = VO_PLL_FREF * pll->fbdiv / pll->refdiv + VO_PLL_FREF * pll->frac / VO_PLL_FRAC_PREC / pll->refdiv; in vo_drv_check_dev_pll_foutvco()
598 vo_err_trace("dev(%d) pll foutcvo (fbdiv,frac,refdiv)=" in vo_drv_check_dev_pll_foutvco()
600 dev, pll->fbdiv, pll->frac, pll->refdiv); in vo_drv_check_dev_pll_foutvco()
712 hi_u32 frac; in vo_drv_set_dev_user_intf_sync_attr() local
727 frac = user_sync_pll->frac; in vo_drv_set_dev_user_intf_sync_attr()
[all...] |
| /device/soc/rockchip/common/sdk_linux/drivers/tty/serial/8250/ |
| H A D | 8250_dwlib.c | 62 * frac = div(F) * 2^dlf_size
66 * so frac = 2^dlf_size * rem / (16 * baud) = (rem << dlf_size) / (16 * baud)
68 static unsigned int dw8250_get_divisor(struct uart_port *p, unsigned int baud, unsigned int *frac) in dw8250_get_divisor() argument
75 *frac = DIV_ROUND_CLOSEST(rem << d->dlf_size, base_baud); in dw8250_get_divisor()
|
| H A D | 8250_port.c | 2639 static unsigned int serial8250_do_get_divisor(struct uart_port *port, unsigned int baud, unsigned int *frac)
in serial8250_do_get_divisor() argument
2669 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud, unsigned int *frac)
in serial8250_get_divisor() argument
2672 return port->get_divisor(port, baud, frac);
in serial8250_get_divisor()
2675 return serial8250_do_get_divisor(port, baud, frac);
in serial8250_get_divisor()
2810 unsigned int baud, quot, frac = 0;
in serial8250_update_uartclk() local
2839 quot = serial8250_get_divisor(port, baud, &frac);
in serial8250_update_uartclk()
2846 serial8250_set_divisor(port, baud, quot, frac);
in serial8250_update_uartclk()
2864 unsigned int baud, quot, frac = 0;
in serial8250_do_set_termios() local
2875 quot = serial8250_get_divisor(port, baud, &frac);
in serial8250_do_set_termios()
2986 serial8250_set_divisor(port, baud, quot, frac);
in serial8250_do_set_termios()
3493 unsigned int baud, quot, frac = 0; serial8250_console_restore() local
[all...] |
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/include/adapt/ |
| H A D | hi_comm_vo_dev_adapt.h | 94 hi_u32 frac; member
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| /device/soc/rockchip/common/vendor/drivers/phy/ |
| H A D | phy-rockchip-inno-hdmi-phy.c | 225 * If only using integer freq div can't get frequency we want, frac
227 * 110.9375 Mhz must use frac div 0xF00000. The actual frequency is different
230 * to note that RK322X platforms do not support frac div.
1139 unsigned long frac;
in inno_hdmi_rk3328_phy_pll_recalc_rate() local
1148 frac = inno_read(inno, 0xd3) | (inno_read(inno, 0xd2) << 0x08) | (inno_read(inno, 0xd1) << 0x10);
in inno_hdmi_rk3328_phy_pll_recalc_rate()
1149 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 0x18));
in inno_hdmi_rk3328_phy_pll_recalc_rate()
1164 frac = vco;
in inno_hdmi_rk3328_phy_pll_recalc_rate()
1165 inno->pixclock = DIV_ROUND_CLOSEST(frac, 0x3E8) * 0x3E8;
in inno_hdmi_rk3328_phy_pll_recalc_rate()
1169 return frac;
in inno_hdmi_rk3328_phy_pll_recalc_rate()
|
| /device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-hdmi-phy.c | 232 * If only using integer freq div can't get frequency we want, frac
234 * 110.9375 Mhz must use frac div 0xF00000. The actual frequency is different
237 * to note that RK322X platforms do not support frac div.
1047 unsigned long frac; in inno_hdmi_rk3328_phy_pll_recalc_rate() local
1056 frac = inno_read(inno, 0xd3) | in inno_hdmi_rk3328_phy_pll_recalc_rate()
1059 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); in inno_hdmi_rk3328_phy_pll_recalc_rate()
1073 frac = vco; in inno_hdmi_rk3328_phy_pll_recalc_rate()
1074 inno->pixclock = DIV_ROUND_CLOSEST(frac, 1000) * 1000; in inno_hdmi_rk3328_phy_pll_recalc_rate()
1078 return frac; in inno_hdmi_rk3328_phy_pll_recalc_rate()
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/drm_hal/ |
| H A D | drm_hal_display.c | 506 param->user_info.user_intf_sync_attr.user_sync_pll.frac = intf_sync_attr->user_intf_sync_attr.user_sync_pll.frac; in drm_hal_disp_attach_user_intf_sync()
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/mkp/src/ |
| H A D | vou_proc.c | 173 user_sync_pll->fbdiv, user_sync_pll->frac, user_sync_pll->refdiv, in vou_proc_dev_clk_info()
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| /device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/ |
| H A D | clk.h | 337 .frac = _frac, \
401 unsigned int frac; member
|
| /device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/ |
| H A D | clk.h | 337 .frac = _frac, \
401 unsigned int frac; member
|
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/include/ |
| H A D | vou_drv.h | 364 hi_u32 frac; member
|
| /device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/ |
| H A D | wlioctl.h | 19761 uint8 frac[WL_RSSI_ANT_MAX]; member
|