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Searched refs:dbclk_div_con (Results 1 - 6 of 6) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/pinctrl/
H A Dpinctrl-rockchip.h37 u32 dbclk_div_con; member
/device/soc/rockchip/common/vendor/drivers/gpio/
H A Dgpio-rockchip.c55 .dbclk_div_con = 0x48,
218 cur_div_reg = readl(bank->reg_base + reg->dbclk_div_con); in rockchip_gpio_set_debounce()
220 writel(div_reg, bank->reg_base + reg->dbclk_div_con); in rockchip_gpio_set_debounce()
/device/soc/rockchip/common/sdk_linux/drivers/gpio/
H A Dgpio-rockchip.c55 .dbclk_div_con = 0x48,
221 cur_div_reg = readl(bank->reg_base + reg->dbclk_div_con); in rockchip_gpio_set_debounce()
223 writel(div_reg, bank->reg_base + reg->dbclk_div_con); in rockchip_gpio_set_debounce()
/device/soc/rockchip/rk3588/kernel/drivers/pinctrl/
H A Dpinctrl-rockchip.h216 * @dbclk_div_con: setting for divider of debounce clock
233 u32 dbclk_div_con; member
/device/soc/rockchip/rk3588/kernel/include/linux/
H A Dpinctrl-rockchip.h216 * @dbclk_div_con: setting for divider of debounce clock
233 u32 dbclk_div_con; member
/device/soc/rockchip/rk3588/kernel/drivers/gpio/
H A Dgpio-rockchip.c57 .dbclk_div_con = 0x48,
219 reg->dbclk_div_con); in rockchip_gpio_set_debounce()
222 reg->dbclk_div_con); in rockchip_gpio_set_debounce()

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