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Searched refs:db (Results 1 - 15 of 15) sorted by relevance

/device/soc/hisilicon/hi3516dv300/sdk_linux/sample/platform/higv/
H A Dlistbox.c66 HIGV_HANDLE db = 0; in LISTBOX_WIN_Onshow() local
75 ret = HI_GV_ADM_GetDDBHandle(ADM_SET_STRINGID, &db); in LISTBOX_WIN_Onshow()
82 HI_GV_DDB_EnableDataChange(db, HI_FALSE); in LISTBOX_WIN_Onshow()
85 HI_GV_DDB_Clear(db); in LISTBOX_WIN_Onshow()
95 HI_GV_DDB_Append(db, &dbRow); in LISTBOX_WIN_Onshow()
98 HI_GV_DDB_EnableDataChange(db, HI_TRUE); in LISTBOX_WIN_Onshow()
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/
H A Ddrm_edid.c3759 static int do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) in do_cea_modes() argument
3767 mode = drm_display_mode_from_vic_index(connector, db, len, i); in do_cea_modes()
3779 drm_add_cmdb_modes(connector, db[i]); in do_cea_modes()
3907 * @db: start of the CEA vendor specific block
3908 * @len: length of the CEA block payload, ie. one can access up to db[len]
3913 static int do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len, const u8 *video_db, u8 video_len) in do_hdmi_vsdb_modes() argument
3926 if (!(db[0x8] & (0x1 << 0x5))) { in do_hdmi_vsdb_modes()
3931 if (db[0x8] & (0x1 << 0x7)) { in do_hdmi_vsdb_modes()
3936 if (db[0x8] & (0x1 << 0x6)) { in do_hdmi_vsdb_modes()
3948 if (db[ in do_hdmi_vsdb_modes()
4055 cea_db_payload_len(const u8 *db) cea_db_payload_len() argument
4060 cea_db_extended_tag(const u8 *db) cea_db_extended_tag() argument
4065 cea_db_tag(const u8 *db) cea_db_tag() argument
4125 cea_db_is_hdmi_vsdb(const u8 *db) cea_db_is_hdmi_vsdb() argument
4142 cea_db_is_hdmi_forum_vsdb(const u8 *db) cea_db_is_hdmi_forum_vsdb() argument
4159 cea_db_is_vcdb(const u8 *db) cea_db_is_vcdb() argument
4176 cea_db_is_y420cmdb(const u8 *db) cea_db_is_y420cmdb() argument
4193 cea_db_is_y420vdb(const u8 *db) cea_db_is_y420vdb() argument
4214 drm_parse_y420cmdb_bitmap(struct drm_connector *connector, const u8 *db) drm_parse_y420cmdb_bitmap() argument
4259 const u8 *db, *hdmi = NULL, *video = NULL; add_cea_modes() local
4346 cea_db_is_hdmi_hdr_metadata_block(const u8 *db) cea_db_is_hdmi_hdr_metadata_block() argument
4374 drm_parse_hdr_metadata_block(struct drm_connector *connector, const u8 *db) drm_parse_hdr_metadata_block() argument
4394 drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db) drm_parse_hdmi_vsdb_audio() argument
4500 u8 *db; drm_edid_to_eld() local
4619 u8 *db = &cea[i]; drm_edid_to_sad() local
4682 const u8 *db = &cea[i]; drm_edid_to_speaker_allocation() local
4855 drm_parse_vcdb(struct drm_connector *connector, const u8 *db) drm_parse_vcdb() argument
4902 drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector, const u8 *db) drm_parse_ycbcr420_deep_color_info() argument
5078 drm_parse_hdmi_vsdb_video(struct drm_connector *connector, const u8 *db) drm_parse_hdmi_vsdb_video() argument
5127 const u8 *db = &edid_ext[i]; drm_parse_cea_ext() local
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_drv.c309 static int cea_db_tag(const u8 *db) in cea_db_tag() argument
311 return db[0] >> 0x5; in cea_db_tag()
314 static int cea_db_payload_len(const u8 *db) in cea_db_payload_len() argument
316 return db[0] & 0x1f; in cea_db_payload_len()
325 static bool cea_db_is_hdmi_next_hdr_block(const u8 *db) in cea_db_is_hdmi_next_hdr_block() argument
329 if (cea_db_tag(db) != 0x07) { in cea_db_is_hdmi_next_hdr_block()
333 if (cea_db_payload_len(db) < 0xb) { in cea_db_is_hdmi_next_hdr_block()
337 oui = (db[0x3] << 0x10) | (db[0x2] << 0x8) | db[ in cea_db_is_hdmi_next_hdr_block()
342 cea_db_is_hdmi_forum_vsdb(const u8 *db) cea_db_is_hdmi_forum_vsdb() argument
832 const u8 *db = &edid_ext[i]; rockchip_drm_parse_cea_ext() local
865 const u8 *db = &edid_ext[i]; rockchip_drm_parse_next_hdr() local
[all...]
H A Ddw-dp.c230 u8 db[32]; member
1097 const u8 *payload = sdp->db; in dw_dp_send_sdp()
1136 sdp->db[0x10] = (vsc->pixelformat & 0xf) << 0x4; in dw_dp_vsc_sdp_pack()
1137 sdp->db[0x10] |= vsc->colorimetry & 0xf; in dw_dp_vsc_sdp_pack()
1141 sdp->db[0x11] = 0x1; in dw_dp_vsc_sdp_pack()
1144 sdp->db[0x11] = 0x2; in dw_dp_vsc_sdp_pack()
1147 sdp->db[0x11] = 0x3; in dw_dp_vsc_sdp_pack()
1150 sdp->db[0x11] = 0x4; in dw_dp_vsc_sdp_pack()
1158 sdp->db[0x11] |= 0x80; in dw_dp_vsc_sdp_pack()
1161 sdp->db[ in dw_dp_vsc_sdp_pack()
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/irqchip/
H A Dirq-gic-v4.c220 int its_make_vpe_non_resident(struct its_vpe *vpe, bool db) in its_make_vpe_non_resident() argument
231 info.req_db = db; in its_make_vpe_non_resident()
234 while (db && irqd_irq_disabled(&desc->irq_data)) { in its_make_vpe_non_resident()
H A Dirq-gic-v3-its.c550 static void its_encode_db(struct its_cmd_block *cmd, bool db) in its_encode_db() argument
552 its_mask_encode(&cmd->raw_cmd[0x2], db, 0x3f, 0x3f); in its_encode_db()
791 u32 db; in its_build_vmapti_cmd() local
794 db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; in its_build_vmapti_cmd()
796 db = 0x3FF; in its_build_vmapti_cmd()
803 its_encode_db_phys_id(cmd, db); in its_build_vmapti_cmd()
813 u32 db; in its_build_vmovi_cmd() local
816 db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; in its_build_vmovi_cmd()
818 db = 0x3ff; in its_build_vmovi_cmd()
825 its_encode_db_phys_id(cmd, db); in its_build_vmovi_cmd()
[all...]
/device/soc/rockchip/common/vendor/drivers/pci/
H A Drockchip-pcie-dma.h81 union db { union
151 union db start;
/device/soc/rockchip/common/sdk_linux/drivers/pci/controller/
H A Drockchip-pcie-dma.h82 union db { union
152 union db start;
/device/soc/rockchip/rk3588/kernel/include/linux/
H A Drockchip-pcie-dma.h84 union db { union
154 union db start;
/device/soc/rockchip/rk3588/kernel/drivers/pci/controller/
H A Drockchip-pcie-dma.h84 union db { union
154 union db start;
/device/soc/rockchip/common/sdk_linux/include/linux/irqchip/
H A Darm-gic-v4.h134 int its_make_vpe_non_resident(struct its_vpe *vpe, bool db);
/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/
H A Ddw-dp.c231 u8 db[32]; member
1101 const u8 *payload = sdp->db; in dw_dp_send_sdp()
1142 sdp->db[16] = (vsc->pixelformat & 0xf) << 4; in dw_dp_vsc_sdp_pack()
1143 sdp->db[16] |= vsc->colorimetry & 0xf; in dw_dp_vsc_sdp_pack()
1147 sdp->db[17] = 0x1; in dw_dp_vsc_sdp_pack()
1150 sdp->db[17] = 0x2; in dw_dp_vsc_sdp_pack()
1153 sdp->db[17] = 0x3; in dw_dp_vsc_sdp_pack()
1156 sdp->db[17] = 0x4; in dw_dp_vsc_sdp_pack()
1164 sdp->db[17] |= 0x80; in dw_dp_vsc_sdp_pack()
1166 sdp->db[1 in dw_dp_vsc_sdp_pack()
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/app/demo/src/
H A Dnetcfg_sample.c338 g_netCfgPara.db = SAMPLE_NETCFG_DEFAULT_DB; in SampleBizTask()
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_reg.c1004 analogix_dp_write(dp, ANALOGIX_DP_VSC_SHADOW_DB0, vsc->db[0]); in analogix_dp_send_psr_spd()
1005 analogix_dp_write(dp, ANALOGIX_DP_VSC_SHADOW_DB1, vsc->db[1]); in analogix_dp_send_psr_spd()
1027 psr_status >= 0 && ((vsc->db[1] && psr_status == DP_PSR_SINK_ACTIVE_RFB) || in analogix_dp_send_psr_spd()
1028 (!vsc->db[1] && psr_status == DP_PSR_SINK_INACTIVE)), in analogix_dp_send_psr_spd()
H A Danalogix_dp_core.c1050 psr_vsc.db[0] = 0; in analogix_dp_enable_psr()
1051 psr_vsc.db[1] = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID; in analogix_dp_enable_psr()
1097 psr_vsc.db[0] = 0; in analogix_dp_disable_psr()
1098 psr_vsc.db[1] = 0; in analogix_dp_disable_psr()

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