/device/soc/hisilicon/common/platform/uart/ |
H A D | uart_pl011.c | 173 uint32_t cr; in Pl011ConfigIn() local 183 cr = OSAL_READW(port->physBase + UART_CR); in Pl011ConfigIn() 190 cr |= UART_CR_CTS; in Pl011ConfigIn() 192 cr &= ~UART_CR_CTS; in Pl011ConfigIn() 195 cr |= UART_CR_RTS; in Pl011ConfigIn() 197 cr &= ~UART_CR_RTS; in Pl011ConfigIn() 202 cr &= ~UART_CR_EN; in Pl011ConfigIn() 203 OSAL_WRITEW(cr, port->physBase + UART_CR); in Pl011ConfigIn() 211 cr |= UART_CR_EN; in Pl011ConfigIn() 213 OSAL_WRITEW(cr, por in Pl011ConfigIn() 220 uint32_t cr; Pl011StartUp() local [all...] |
/device/qemu/drivers/uart/ |
H A D | uart_pl011.c | 174 uint32_t cr; in Pl011ConfigIn() local 184 cr = OSAL_READW(port->physBase + UART_CR); in Pl011ConfigIn() 191 cr |= UART_CR_CTS; in Pl011ConfigIn() 193 cr &= ~UART_CR_CTS; in Pl011ConfigIn() 196 cr |= UART_CR_RTS; in Pl011ConfigIn() 198 cr &= ~UART_CR_RTS; in Pl011ConfigIn() 203 cr &= ~UART_CR_EN; in Pl011ConfigIn() 204 OSAL_WRITEW(cr, port->physBase + UART_CR); in Pl011ConfigIn() 212 cr |= UART_CR_EN; in Pl011ConfigIn() 214 OSAL_WRITEW(cr, por in Pl011ConfigIn() 221 uint32_t cr; Pl011StartUp() local [all...] |
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/uart/ |
H A D | hi_uart.c | 55 hi_u16 cr; member 453 g_uart_regs_save[port_num].cr = hi_reg_read_val16(udd->phys_base + UART_CR); in hi_uart_lp_save() 490 temp |= g_uart_regs_save[port_num].cr & (0x3 << OFFSET_14_BITS); in hi_uart_lp_restore()
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/device/soc/rockchip/common/vendor/drivers/video/rockchip/mpp/ |
H A D | mpp_iep2.c | 82 u32 cr;
member 377 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_CURV, cfg->src[0].cr);
in iep2_config() 381 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_NXTV, cfg->src[1].cr);
in iep2_config() 403 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_CURV, top->cr);
in iep2_config() 406 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_NXTV, bot->cr);
in iep2_config() 411 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_PREV, cfg->src[0x2].cr);
in iep2_config()
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/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/mpp/ |
H A D | mpp_iep2.c | 92 u32 cr; member 404 cfg->src[0].cr); in iep2_config() 411 cfg->src[1].cr); in iep2_config() 433 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_CURV, top->cr); in iep2_config() 436 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_NXTV, bot->cr); in iep2_config() 441 mpp_write_relaxed(mpp, IEP2_REG_SRC_ADDR_PREV, cfg->src[2].cr); in iep2_config()
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/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/i2c/std_i2c/ |
H A D | Makefile | 34 ARFLAGS = cr
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/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/i2c/gpio_i2c/ |
H A D | Makefile | 34 ARFLAGS = cr
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/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/gpio/ |
H A D | Makefile | 34 ARFLAGS = cr
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/device/soc/hisilicon/hi3861v100/sdk_liteos/build/make_scripts/ |
H A D | config.mk | 60 ARFLAGS := cr
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/device/soc/hisilicon/hi3861v100/sdk_liteos/build/win_scripts/build/make_scripts/ |
H A D | config.mk | 60 ARFLAGS := cr
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/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/tde/driver/src/adp/tde_v2_0/ |
H A D | tde_hal_k.c | 139 static hi_u32 tde_hal_get_ycb_cr_key_mask(hi_u8 cr, hi_u8 cb, hi_u8 cy, hi_u8 alpha); 1962 hi_tde_color_key_comp cr = color_key->color_key_value.ycbcr_color_key.cr; in tde_hal_node_set_ycbcr_color_key_para() local 1968 tde_hal_get_ycb_cr_key_mask(cr.component_min, cb.component_min, y.component_min, alpha.component_min); in tde_hal_node_set_ycbcr_color_key_para() 1970 tde_hal_get_ycb_cr_key_mask(cr.component_max, cb.component_max, y.component_max, alpha.component_max); in tde_hal_node_set_ycbcr_color_key_para() 1972 tde_hal_get_ycb_cr_key_mask(cr.component_mask, cb.component_mask, y.component_mask, alpha.component_mask); in tde_hal_node_set_ycbcr_color_key_para() 1974 hw_node->cbmkeypara.bits.keybmode = tde_hal_get_color_key_mode(&cr); in tde_hal_node_set_ycbcr_color_key_para() 2024 static hi_u32 tde_hal_get_ycb_cr_key_mask(hi_u8 cr, hi_u8 cb, hi_u8 cy, hi_u8 alpha) in tde_hal_get_ycb_cr_key_mask() argument 2026 return (hi_u32)(cr | (cb << TDE_EIGHT_BITS_SHIFT) | (cy << TDE_SIXTEEN_BITS_SHIFT) | in tde_hal_get_ycb_cr_key_mask()
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H A D | tde_osictl_k.c | 60 #define ycc2rgb(y, cb, cr, r, g, b) \ 62 r = (((298 * ((y) - 16) + 409 * ((cr) - 128)) >> 7) + 1) >> 1; \ 63 g = (((298 * ((y) - 16) - 100 * ((cb) - 128) - 208 * ((cr) - 128)) >> 7) + 1) >> 1; \ 67 #define rgb2ycc(r, g, b, y, cb, cr) \ 71 cr = ((((450 * (r) - 377 * (g) - 73 * (b)) >> 9) + 1) >> 1) + 128; \ 516 hi_u8 a, r, g, b, y, cb, cr; in tde_osi_color_convert() local 558 rgb2ycc(r, g, b, y, cb, cr); in tde_osi_color_convert() 559 *out_color = (a << 24) + (y << 16) + (cb << 8) + cr; /* 8 16 24 Data from the */ in tde_osi_color_convert() 562 ycc2rgb(r, g, b, y, cb, cr); in tde_osi_color_convert() 563 *out_color = (a << 24) + (y << 16) + (cb << 8) + cr; /* in tde_osi_color_convert() [all...] |
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/tde/driver/include/ |
H A D | drv_tde_type.h | 300 hi_tde_color_key_comp cr; /* <Cr component */ member
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