/device/soc/hisilicon/common/platform/dmac/ |
H A D | dmac_hi35xx.c | 78 static int HiDmacIsrErrProc(struct DmaCntlr *cntlr, uint16_t chan) in HiDmacIsrErrProc() argument 82 chanErrStats[ERROR_STATUS_NUM_0] = OSAL_READL(cntlr->remapBase + HIDMAC_INT_ERR1_OFFSET); in HiDmacIsrErrProc() 84 chanErrStats[ERROR_STATUS_NUM_1] = OSAL_READL(cntlr->remapBase + HIDMAC_INT_ERR2_OFFSET); in HiDmacIsrErrProc() 86 chanErrStats[ERROR_STATUS_NUM_2] = OSAL_READL(cntlr->remapBase + HIDMAC_INT_ERR3_OFFSET); in HiDmacIsrErrProc() 93 OSAL_WRITEL(1 << chan, cntlr->remapBase + HIDMAC_INT_ERR1_RAW_OFFSET); in HiDmacIsrErrProc() 94 HDF_LOGE("HIDMAC_INT_ERR1_RAW = 0x%x", OSAL_READL(cntlr->remapBase + HIDMAC_INT_ERR1_RAW_OFFSET)); in HiDmacIsrErrProc() 95 OSAL_WRITEL(1 << chan, cntlr->remapBase + HIDMAC_INT_ERR2_RAW_OFFSET); in HiDmacIsrErrProc() 96 HDF_LOGE("HIDMAC_INT_ERR2_RAW = 0x%x", OSAL_READL(cntlr->remapBase + HIDMAC_INT_ERR2_RAW_OFFSET)); in HiDmacIsrErrProc() 97 OSAL_WRITEL(1 << chan, cntlr->remapBase + HIDMAC_INT_ERR3_RAW_OFFSET); in HiDmacIsrErrProc() 98 HDF_LOGE("HIDMAC_INT_ERR3_RAW = 0x%x", OSAL_READL(cntlr in HiDmacIsrErrProc() 104 HiDmacGetChanStat(struct DmaCntlr *cntlr, uint16_t chan) HiDmacGetChanStat() argument 169 HiDmacGetChanInfo(struct DmaCntlr *cntlr, struct DmacChanInfo *chanInfo, struct DmacMsg *msg) HiDmacGetChanInfo() argument 205 HiDmacDisable(struct DmaCntlr *cntlr, uint16_t channel) HiDmacDisable() argument 216 HiDmacStartM2M(struct DmaCntlr *cntlr, struct DmacChanInfo *chanInfo, uintptr_t psrc, uintptr_t pdst, size_t len) HiDmacStartM2M() argument 250 HiDmacStartLli(struct DmaCntlr *cntlr, struct DmacChanInfo *chanInfo) HiDmacStartLli() argument 294 HiDmacGetCurrDstAddr(struct DmaCntlr *cntlr, uint16_t channel) HiDmacGetCurrDstAddr() argument 328 Hi35xxDmacInit(struct DmaCntlr *cntlr) Hi35xxDmacInit() argument 374 HiDmacParseHcs(struct DmaCntlr *cntlr, const struct DeviceResourceNode *node) HiDmacParseHcs() argument 427 struct DmaCntlr *cntlr = NULL; HiDmacBind() local 450 struct DmaCntlr *cntlr = NULL; HiDmacInit() local 471 struct DmaCntlr *cntlr = NULL; HiDmacRelease() local [all...] |
/device/soc/hisilicon/common/platform/mtd/hifmc100/common/ |
H A D | hifmc100.c | 85 const struct DeviceResourceNode *HifmcCntlrGetDevTableNode(struct HifmcCntlr *cntlr) in HifmcCntlrGetDevTableNode() argument 96 if (cntlr->flashType == HIFMC_CFG_TYPE_SPI_NOR) { in HifmcCntlrGetDevTableNode() 97 tableNode = drsOps->GetChildNode(cntlr->drsNode, "spi_nor_dev_table"); in HifmcCntlrGetDevTableNode() 99 tableNode = drsOps->GetChildNode(cntlr->drsNode, "spi_nand_dev_table"); in HifmcCntlrGetDevTableNode() 108 static int32_t HifmcCntlrSearchDevInfo(struct HifmcCntlr *cntlr, struct SpiFlash *spi) in HifmcCntlrSearchDevInfo() argument 110 if (cntlr->flashType == HIFMC_CFG_TYPE_SPI_NOR) { in HifmcCntlrSearchDevInfo() 111 return HifmcCntlrSearchSpinorInfo(cntlr, spi); in HifmcCntlrSearchDevInfo() 113 return HifmcCntlrSearchSpinandInfo(cntlr, spi); in HifmcCntlrSearchDevInfo() 117 static int32_t HifmcCntlrReadDrs(struct HifmcCntlr *cntlr) in HifmcCntlrReadDrs() argument 129 node = cntlr in HifmcCntlrReadDrs() 166 HifmcCntlrInitFlashType(struct HifmcCntlr *cntlr, unsigned int flashType) HifmcCntlrInitFlashType() argument 203 HifmcCntlrReadDevReg(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint8_t cmd) HifmcCntlrReadDevReg() argument 212 HifmcCntlrSet4AddrMode(struct HifmcCntlr *cntlr, int enable) HifmcCntlrSet4AddrMode() argument 226 HifmcCntlrInitBeforeScan(struct HifmcCntlr *cntlr) HifmcCntlrInitBeforeScan() argument 261 HifmcCntlrInitAfterScan(struct HifmcCntlr *cntlr) HifmcCntlrInitAfterScan() argument 299 HifmcCntlrUninit(struct HifmcCntlr *cntlr) HifmcCntlrUninit() argument 304 HifmcCntlrReadId(struct HifmcCntlr *cntlr, uint8_t cs, uint8_t *id, size_t len) HifmcCntlrReadId() argument 313 HifmcCntlrInitSpiFlash(struct HifmcCntlr *cntlr, struct SpiFlash *spi) HifmcCntlrInitSpiFlash() argument 322 HifmcCntlrMtdScan(struct HifmcCntlr *cntlr) HifmcCntlrMtdScan() argument 370 struct HifmcCntlr *cntlr = NULL; HifmcInit() local [all...] |
H A D | hifmc100.h | 264 #define HIFMC_CMD_WAIT_CPU_FINISH(cntlr) \ 268 regval = HIFMC_REG_READ((cntlr), HIFMC_OP_REG_OFF); \ 276 #define HIFMC_DMA_WAIT_INT_FINISH(cntlr) \ 280 regval = HIFMC_REG_READ((cntlr), HIFMC_INT_REG_OFF); \ 287 #define HIFMC_DMA_WAIT_CPU_FINISH(cntlr) \ 291 regval = HIFMC_REG_READ((cntlr), HIFMC_OP_CTRL_REG_OFF); \ 298 uint8_t HifmcCntlrReadDevReg(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint8_t cmd); 300 void HifmcCntlrSet4AddrMode(struct HifmcCntlr *cntlr, int enable); 302 const struct DeviceResourceNode *HifmcCntlrGetDevTableNode(struct HifmcCntlr *cntlr); 306 static inline int32_t HifmcCntlrSetSysClock(struct HifmcCntlr *cntlr, unsigne argument [all...] |
/device/soc/hisilicon/common/platform/mtd/hifmc100/spi_nand/ |
H A D | hifmc100_spi_nand.c | 114 int32_t HifmcCntlrSearchSpinandInfo(struct HifmcCntlr *cntlr, struct SpiFlash *spi) in HifmcCntlrSearchSpinandInfo() argument 122 tableNode = HifmcCntlrGetDevTableNode(cntlr); in HifmcCntlrSearchSpinandInfo() 145 uint8_t HifmcCntlrReadSpinandReg(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint8_t cmd) in HifmcCntlrReadSpinandReg() argument 154 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_CFG_REG_OFF); in HifmcCntlrReadSpinandReg() 162 HIFMC_REG_WRITE(cntlr, reg, HIFMC_CMD_REG_OFF); in HifmcCntlrReadSpinandReg() 165 HIFMC_REG_WRITE(cntlr, reg, HIFMC_DATA_NUM_REG_OFF); in HifmcCntlrReadSpinandReg() 172 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_REG_OFF); in HifmcCntlrReadSpinandReg() 174 HIFMC_CMD_WAIT_CPU_FINISH(cntlr); in HifmcCntlrReadSpinandReg() 177 status = HIFMC_REG_READ(cntlr, HIFMC_FLASH_INFO_REG_OFF); in HifmcCntlrReadSpinandReg() 179 status = OSAL_READB(cntlr in HifmcCntlrReadSpinandReg() 188 HifmcCntlrEcc0Switch(struct HifmcCntlr *cntlr, int enable) HifmcCntlrEcc0Switch() argument 200 HifmcCntlrDevFeatureOp(struct HifmcCntlr *cntlr, struct SpiFlash *spi, bool isGet, uint8_t addr, uint8_t *val) HifmcCntlrDevFeatureOp() argument 262 HifmcCntlrReadIdSpiNand(struct HifmcCntlr *cntlr, uint8_t cs, uint8_t *id, size_t len) HifmcCntlrReadIdSpiNand() argument 304 HifmcCntlrEraseOneBlock(struct HifmcCntlr *cntlr, struct SpiFlash *spi, off_t addr) HifmcCntlrEraseOneBlock() argument 357 HifmcCntlrReadBuf(struct HifmcCntlr *cntlr, uint8_t *buf, size_t len, off_t offset) HifmcCntlrReadBuf() argument 448 HifmcCntlrInitOob(struct HifmcCntlr *cntlr, struct SpiFlash *spi) HifmcCntlrInitOob() argument 495 struct HifmcCntlr *cntlr = NULL; HifmcMtdEraseSpinand() local 540 HifmcCntlrWriteBuf(struct HifmcCntlr *cntlr, struct SpiFlash *spi, const uint8_t *buf, size_t len, off_t offset) HifmcCntlrWriteBuf() argument 566 HifmcCntlrPageProgram(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint32_t page) HifmcCntlrPageProgram() argument 627 HifmcCntlrReadOnePageToBuf(struct HifmcCntlr *cntlr, struct SpiFlash *spi, size_t page) HifmcCntlrReadOnePageToBuf() argument 688 struct HifmcCntlr *cntlr = (struct HifmcCntlr *)spi->mtd.cntlr; HifmcMtdIsBadBlockSpinand() local 716 struct HifmcCntlr *cntlr = NULL; HifmcMtdMarkBadBlockSpinand() local 750 HifmcCntlrWriteOnePage(struct HifmcCntlr *cntlr, struct SpiFlash *spi, struct MtdPage *mtdPage) HifmcCntlrWriteOnePage() argument 806 HifmcCntlrReadOnePage(struct HifmcCntlr *cntlr, struct SpiFlash *spi, struct MtdPage *mtdPage) HifmcCntlrReadOnePage() argument 839 struct HifmcCntlr *cntlr = NULL; HifmcMtdPageTransfer() local 858 HifmcCntlrDevWpDisable(struct HifmcCntlr *cntlr, struct SpiFlash *spi) HifmcCntlrDevWpDisable() argument 889 HifmcCntlrDevEccDisable(struct HifmcCntlr *cntlr, struct SpiFlash *spi) HifmcCntlrDevEccDisable() argument 920 HifmcCntlrInitSpinandDevice(struct HifmcCntlr *cntlr, struct SpiFlash *spi) HifmcCntlrInitSpinandDevice() argument [all...] |
H A D | hifmc100_spi_nand_ids.c | 24 struct HifmcCntlr *cntlr = NULL; in HifmcCntlrSpinandWaitReadyDefault() local 29 if (spi == NULL || spi->mtd.cntlr == NULL) { in HifmcCntlrSpinandWaitReadyDefault() 32 cntlr = spi->mtd.cntlr; in HifmcCntlrSpinandWaitReadyDefault() 35 ret = HifmcCntlrDevFeatureOp(cntlr, spi, true, MTD_SPI_NAND_STATUS_ADDR, &status); in HifmcCntlrSpinandWaitReadyDefault() 50 struct HifmcCntlr *cntlr = NULL; in HifmcCntlrSpinandWriteEnableDefault() local 55 if (spi == NULL || spi->mtd.cntlr == NULL) { in HifmcCntlrSpinandWriteEnableDefault() 58 cntlr = spi->mtd.cntlr; in HifmcCntlrSpinandWriteEnableDefault() 60 ret = HifmcCntlrDevFeatureOp(cntlr, sp in HifmcCntlrSpinandWriteEnableDefault() 105 struct HifmcCntlr *cntlr = NULL; HifmcCntlrSpinandQeEnableDefault() local [all...] |
H A D | hifmc100_spi_nand.h | 22 int32_t HifmcCntlrSearchSpinandInfo(struct HifmcCntlr *cntlr, struct SpiFlash *spi); 23 int32_t HifmcCntlrInitSpinandDevice(struct HifmcCntlr *cntlr, struct SpiFlash *spi); 24 int32_t HifmcCntlrReadIdSpiNand(struct HifmcCntlr *cntlr, uint8_t cs, uint8_t *id, size_t len); 25 int32_t HifmcCntlrInitOob(struct HifmcCntlr *cntlr, struct SpiFlash *spi); 26 uint8_t HifmcCntlrReadSpinandReg(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint8_t cmd); 28 int32_t HifmcCntlrDevFeatureOp(struct HifmcCntlr *cntlr, struct SpiFlash *spi,
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/device/soc/hisilicon/common/platform/mtd/hifmc100/spi_nor/ |
H A D | w25qh.c | 29 struct HifmcCntlr *cntlr = NULL; in HifmcCntlrSpinorEntry4AddrW25qh() local 31 if (spi == NULL || spi->mtd.cntlr == NULL) { in HifmcCntlrSpinorEntry4AddrW25qh() 34 cntlr = spi->mtd.cntlr; in HifmcCntlrSpinorEntry4AddrW25qh() 44 status = HifmcCntlrReadDevReg(cntlr, spi, MTD_SPI_CMD_RDSR3); in HifmcCntlrSpinorEntry4AddrW25qh() 53 HIFMC_REG_WRITE(cntlr, reg, HIFMC_CMD_REG_OFF); in HifmcCntlrSpinorEntry4AddrW25qh() 56 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_CFG_REG_OFF); in HifmcCntlrSpinorEntry4AddrW25qh() 59 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_REG_OFF); in HifmcCntlrSpinorEntry4AddrW25qh() 61 HIFMC_CMD_WAIT_CPU_FINISH(cntlr); in HifmcCntlrSpinorEntry4AddrW25qh() 64 status = HifmcCntlrReadDevReg(cntlr, sp in HifmcCntlrSpinorEntry4AddrW25qh() 99 struct HifmcCntlr *cntlr = NULL; HifmcCntlrSpinorQeEnableW25qh() local [all...] |
H A D | hifmc100_spi_nor.c | 90 int32_t HifmcCntlrSearchSpinorInfo(struct HifmcCntlr *cntlr, struct SpiFlash *spi) in HifmcCntlrSearchSpinorInfo() argument 98 tableNode = HifmcCntlrGetDevTableNode(cntlr); in HifmcCntlrSearchSpinorInfo() 128 uint8_t HifmcCntlrReadSpinorReg(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint8_t cmd) in HifmcCntlrReadSpinorReg() argument 137 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_CFG_REG_OFF); in HifmcCntlrReadSpinorReg() 145 HIFMC_REG_WRITE(cntlr, reg, HIFMC_CMD_REG_OFF); in HifmcCntlrReadSpinorReg() 148 HIFMC_REG_WRITE(cntlr, reg, HIFMC_DATA_NUM_REG_OFF); in HifmcCntlrReadSpinorReg() 155 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_REG_OFF); in HifmcCntlrReadSpinorReg() 157 HIFMC_CMD_WAIT_CPU_FINISH(cntlr); in HifmcCntlrReadSpinorReg() 160 status = HIFMC_REG_READ(cntlr, HIFMC_FLASH_INFO_REG_OFF); in HifmcCntlrReadSpinorReg() 162 status = OSAL_READB(cntlr in HifmcCntlrReadSpinorReg() 171 HifmcCntlrReadIdSpiNor(struct HifmcCntlr *cntlr, uint8_t cs, uint8_t *id, size_t len) HifmcCntlrReadIdSpiNor() argument 204 HifmcCntlrEraseOneBlock(struct HifmcCntlr *cntlr, struct SpiFlash *spi, off_t from) HifmcCntlrEraseOneBlock() argument 247 struct HifmcCntlr *cntlr = NULL; HifmcSpinorErase() local 278 HifmcCntlrDmaTransfer(struct HifmcCntlr *cntlr, struct SpiFlash *spi, off_t offset, uint8_t *buf, size_t len, int wr) HifmcCntlrDmaTransfer() argument 340 struct HifmcCntlr *cntlr = (struct HifmcCntlr *)spi->mtd.cntlr; HifmcCntlrDmaWriteReadOnce() local 389 struct HifmcCntlr *cntlr = (struct HifmcCntlr *)mtdDevice->cntlr; HifmcCntlrDmaWriteRead() local 434 struct HifmcCntlr *cntlr = NULL; HifmcSpinorWrite() local 459 struct HifmcCntlr *cntlr = NULL; HifmcSpinorRead() local 484 HifmcCntlrInitSpinorDevice(struct HifmcCntlr *cntlr, struct SpiFlash *spi) HifmcCntlrInitSpinorDevice() argument [all...] |
H A D | hifmc100_spi_nor_ids.c | 24 struct HifmcCntlr *cntlr = NULL; in HifmcCntlrSpinorWaitReadyDefault() local 28 if (spi == NULL || spi->mtd.cntlr == NULL) { in HifmcCntlrSpinorWaitReadyDefault() 31 cntlr = spi->mtd.cntlr; in HifmcCntlrSpinorWaitReadyDefault() 34 status = HifmcCntlrReadDevReg(cntlr, spi, MTD_SPI_CMD_RDSR); in HifmcCntlrSpinorWaitReadyDefault() 46 struct HifmcCntlr *cntlr = NULL; in HifmcCntlrSpinorWriteEnableDefault() local 49 if (spi == NULL || spi->mtd.cntlr == NULL) { in HifmcCntlrSpinorWriteEnableDefault() 52 cntlr = spi->mtd.cntlr; in HifmcCntlrSpinorWriteEnableDefault() 54 reg = HifmcCntlrReadDevReg(cntlr, sp in HifmcCntlrSpinorWriteEnableDefault() 90 struct HifmcCntlr *cntlr = NULL; HifmcCntlrSpinorQeEnableDefault() local 158 struct HifmcCntlr *cntlr = NULL; HifmcCntlrSpinorEntry4AddrDefault() local [all...] |
H A D | mx25l.c | 28 struct HifmcCntlr *cntlr = NULL; in HifmcCntlrSpinorQeEnableMx25l() local 30 if (spi == NULL || spi->mtd.cntlr == NULL) { in HifmcCntlrSpinorQeEnableMx25l() 33 cntlr = spi->mtd.cntlr; in HifmcCntlrSpinorQeEnableMx25l() 38 status = HifmcCntlrReadDevReg(cntlr, spi, MTD_SPI_CMD_RDSR); in HifmcCntlrSpinorQeEnableMx25l() 51 OSAL_WRITEB(status, cntlr->memBase); in HifmcCntlrSpinorQeEnableMx25l() 54 HIFMC_REG_WRITE(cntlr, reg, HIFMC_CMD_REG_OFF); in HifmcCntlrSpinorQeEnableMx25l() 57 HIFMC_REG_WRITE(cntlr, reg, HIFMC_OP_CFG_REG_OFF); in HifmcCntlrSpinorQeEnableMx25l() 60 HIFMC_REG_WRITE(cntlr, reg, HIFMC_DATA_NUM_REG_OFF); in HifmcCntlrSpinorQeEnableMx25l() 65 HIFMC_REG_WRITE(cntlr, re in HifmcCntlrSpinorQeEnableMx25l() [all...] |
H A D | hifmc100_spi_nor.h | 21 int32_t HifmcCntlrSearchSpinorInfo(struct HifmcCntlr *cntlr, struct SpiFlash *spi); 22 int32_t HifmcCntlrInitSpinorDevice(struct HifmcCntlr *cntlr, struct SpiFlash *spi); 23 int32_t HifmcCntlrReadIdSpiNor(struct HifmcCntlr *cntlr, uint8_t cs, uint8_t *id, size_t len); 24 uint8_t HifmcCntlrReadSpinorReg(struct HifmcCntlr *cntlr, struct SpiFlash *spi, uint8_t cmd);
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/device/qemu/drivers/virtio/ |
H A D | fakesdio.c | 85 static void FakeSdioDeleteCntlr(struct MmcCntlr *cntlr) in FakeSdioDeleteCntlr() argument 87 if (cntlr == NULL) { in FakeSdioDeleteCntlr() 90 if (cntlr->curDev != NULL) { in FakeSdioDeleteCntlr() 91 MmcDeviceRemove(cntlr->curDev); in FakeSdioDeleteCntlr() 92 OsalMemFree(cntlr->curDev); in FakeSdioDeleteCntlr() 94 MmcCntlrRemove(cntlr); in FakeSdioDeleteCntlr() 95 OsalMemFree(cntlr); in FakeSdioDeleteCntlr() 98 static int32_t FakeSdioCntlrParse(struct MmcCntlr *cntlr, struct HdfDeviceObject *obj) in FakeSdioCntlrParse() argument 104 if (obj == NULL || cntlr == NULL) { in FakeSdioCntlrParse() 120 ret = drsOps->GetUint16(node, "hostId", &(cntlr in FakeSdioCntlrParse() 134 FakeSdioRescan(struct MmcCntlr *cntlr) FakeSdioRescan() argument 149 struct MmcCntlr *cntlr = NULL; FakeSdioBind() local 217 FakeGiopDummyOps0(struct GpioCntlr *cntlr, uint16_t local, uint16_t dir) FakeGiopDummyOps0() argument 234 struct GpioCntlr *cntlr = OsalMemCalloc(sizeof(struct GpioCntlr)); HdfWlanConfigSDIO() local [all...] |
H A D | virtblock.c | 411 static int32_t VirtMmcIO(const struct MmcCntlr *cntlr, const struct MmcCmd *cmd) in VirtMmcIO() argument 413 struct Virtblk *blk = cntlr->priv; in VirtMmcIO() 417 if (cntlr->curDev->state.bits.blockAddr == 0) { in VirtMmcIO() 438 static int32_t VirtMmcDoRequest(struct MmcCntlr *cntlr, struct MmcCmd *cmd) in VirtMmcDoRequest() argument 440 if ((cntlr == NULL) || (cntlr->priv == NULL) || (cmd == NULL)) { in VirtMmcDoRequest() 443 struct Virtblk *blk = cntlr->priv; in VirtMmcDoRequest() 476 return VirtMmcIO(cntlr, cmd); in VirtMmcDoRequest() 484 static bool VirtMmcPlugged(struct MmcCntlr *cntlr) in VirtMmcPlugged() argument 486 (void)cntlr; in VirtMmcPlugged() 490 VirtMmcBusy(struct MmcCntlr *cntlr) VirtMmcBusy() argument 509 struct MmcCntlr *cntlr = deviceObject->priv; HdfVirtblkRelease() local 526 struct MmcCntlr *cntlr = NULL; HdfVirtblkBind() local [all...] |
/device/soc/hisilicon/common/platform/i2s/ |
H A D | i2s_hi35xx.c | 145 static int32_t Hi35xxI2sEnable(struct I2sCntlr *cntlr) in Hi35xxI2sEnable() argument 147 if (cntlr == NULL || cntlr->priv == NULL) { in Hi35xxI2sEnable() 148 I2S_PRINT_LOG_ERR("%s: cntlr priv or cfg is NULL", __func__); in Hi35xxI2sEnable() 154 static int32_t Hi35xxI2sDisable(struct I2sCntlr *cntlr) in Hi35xxI2sDisable() argument 156 if (cntlr == NULL || cntlr->priv == NULL) { in Hi35xxI2sDisable() 157 I2S_PRINT_LOG_ERR("%s: cntlr priv or cfg is NULL", __func__); in Hi35xxI2sDisable() 161 struct I2sConfigInfo *i2sCfg = (struct I2sConfigInfo *)cntlr->priv; in Hi35xxI2sDisable() 171 static int32_t Hi35xxI2sOpen(struct I2sCntlr *cntlr) in Hi35xxI2sOpen() argument 177 Hi35xxI2sClose(struct I2sCntlr *cntlr) Hi35xxI2sClose() argument 183 Hi35xxI2sGetCfg(struct I2sCntlr *cntlr, struct I2sCfg *cfg) Hi35xxI2sGetCfg() argument 211 Hi35xxI2sSetCfg(struct I2sCntlr *cntlr, struct I2sCfg *cfg) Hi35xxI2sSetCfg() argument 274 Hi35xxI2sStartWrite(struct I2sCntlr *cntlr) Hi35xxI2sStartWrite() argument 299 Hi35xxI2sStopWrite(struct I2sCntlr *cntlr) Hi35xxI2sStopWrite() argument 343 Hi35xxI2sStartRead(struct I2sCntlr *cntlr) Hi35xxI2sStartRead() argument 369 Hi35xxI2sStopRead(struct I2sCntlr *cntlr) Hi35xxI2sStopRead() argument 419 Hi35xxI2sRead(struct I2sCntlr *cntlr, struct I2sMsg *msgs) Hi35xxI2sRead() argument 448 Hi35xxI2sWrite(struct I2sCntlr *cntlr, struct I2sMsg *msgs) Hi35xxI2sWrite() argument 498 Hi35xxI2sTransfer(struct I2sCntlr *cntlr, struct I2sMsg *msgs) Hi35xxI2sTransfer() argument 534 I2sGetConfigInfoFromHcs(struct I2sCntlr *cntlr, const struct DeviceResourceNode *node) I2sGetConfigInfoFromHcs() argument 607 I2sInit(struct I2sCntlr *cntlr, const struct HdfDeviceObject *device) I2sInit() argument 670 struct I2sCntlr *cntlr = NULL; HdfI2sDeviceInit() local 693 struct I2sCntlr *cntlr = NULL; HdfI2sDeviceRelease() local [all...] |
/device/soc/hisilicon/common/platform/mipi_csi/ |
H A D | mipi_csi_hi35xx.c | 48 static bool MipiIsHsModeCfged(struct MipiCsiCntlr *cntlr) in MipiIsHsModeCfged() argument 52 OsalSpinLock(&cntlr->ctxLock); in MipiIsHsModeCfged() 53 hsModeCfged = cntlr->ctx.hsModeCfged; in MipiIsHsModeCfged() 54 OsalSpinUnlock(&cntlr->ctxLock); in MipiIsHsModeCfged() 59 static bool MipiIsDevValid(struct MipiCsiCntlr *cntlr, uint8_t devno) in MipiIsDevValid() argument 63 OsalSpinLock(&cntlr->ctxLock); in MipiIsDevValid() 64 devValid = cntlr->ctx.devValid[devno]; in MipiIsDevValid() 65 OsalSpinUnlock(&cntlr->ctxLock); in MipiIsDevValid() 70 static bool MipiIsDevCfged(struct MipiCsiCntlr *cntlr, uint8_t devno) in MipiIsDevCfged() argument 74 OsalSpinLock(&cntlr in MipiIsDevCfged() 122 CheckLaneId(struct MipiCsiCntlr *cntlr, uint8_t devno, InputMode inputMode, const short pLaneId[]) CheckLaneId() argument 270 CheckLvdsDevAttr(struct MipiCsiCntlr *cntlr, uint8_t devno, const LvdsDevAttr *pAttr) CheckLvdsDevAttr() argument 401 MipiSetLvdsPhySyncCfg(const struct MipiCsiCntlr *cntlr, uint8_t devno, const LvdsDevAttr *pLvdsAttr, unsigned int laneBitmap, unsigned int laneNum) MipiSetLvdsPhySyncCfg() argument 418 MipiSetLvdsDevAttr(struct MipiCsiCntlr *cntlr, const ComboDevAttr *pComboDevAttr) MipiSetLvdsDevAttr() argument 472 CheckMipiDevAttr(struct MipiCsiCntlr *cntlr, uint8_t devno, const MipiDevAttr *pAttr) CheckMipiDevAttr() argument 546 MipiSetPhyCfg(struct MipiCsiCntlr *cntlr, const ComboDevAttr *pComboDevAttr) MipiSetPhyCfg() argument 581 MipiSetMipiDevAttr(struct MipiCsiCntlr *cntlr, const ComboDevAttr *pComboDevAttr) MipiSetMipiDevAttr() argument 664 MipiSetComboDevAttr(struct MipiCsiCntlr *cntlr, const ComboDevAttr *pAttr) MipiSetComboDevAttr() argument 717 SetComboDevAttr(struct MipiCsiCntlr *cntlr, const ComboDevAttr *argp) SetComboDevAttr() argument 744 Hi35xxSetComboDevAttr(struct MipiCsiCntlr *cntlr, ComboDevAttr *pAttr) Hi35xxSetComboDevAttr() argument 758 Hi35xxSetExtDataType(struct MipiCsiCntlr *cntlr, ExtDataType *dataType) Hi35xxSetExtDataType() argument 810 Hi35xxSetPhyCmvmode(struct MipiCsiCntlr *cntlr, uint8_t devno, PhyCmvMode cmvMode) Hi35xxSetPhyCmvmode() argument 849 Hi35xxResetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource) Hi35xxResetSensor() argument 862 Hi35xxUnresetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource) Hi35xxUnresetSensor() argument 875 Hi35xxResetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev) Hi35xxResetRx() argument 888 Hi35xxUnresetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev) Hi35xxUnresetRx() argument 901 MipiSetDevValid(struct MipiCsiCntlr *cntlr, LaneDivideMode mode) MipiSetDevValid() argument 916 Hi35xxSetHsMode(struct MipiCsiCntlr *cntlr, LaneDivideMode laneDivideMode) Hi35xxSetHsMode() argument 937 Hi35xxEnableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev) Hi35xxEnableClock() argument 950 Hi35xxDisableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev) Hi35xxDisableClock() argument 963 Hi35xxEnableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource) Hi35xxEnableSensorClock() argument 976 Hi35xxDisableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource) Hi35xxDisableSensorClock() argument 990 Hi35xxGetMipiDevCtx(struct MipiCsiCntlr *cntlr, MipiDevCtx *ctx) Hi35xxGetMipiDevCtx() argument 997 Hi35xxGetPhyErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, PhyErrIntCnt *errInfo) Hi35xxGetPhyErrIntCnt() argument 1016 Hi35xxGetMipiErrInt(struct MipiCsiCntlr *cntlr, unsigned int phyId, MipiErrIntCnt *errInfo) Hi35xxGetMipiErrInt() argument 1035 Hi35xxGetLvdsErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, LvdsErrIntCnt *errInfo) Hi35xxGetLvdsErrIntCnt() argument 1054 Hi35xxGetAlignErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, AlignErrIntCnt *errInfo) Hi35xxGetAlignErrIntCnt() argument 1073 Hi35xxGetPhyData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData) Hi35xxGetPhyData() argument 1079 Hi35xxGetPhyMipiLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData) Hi35xxGetPhyMipiLinkData() argument 1085 Hi35xxGetPhyLvdsLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData) Hi35xxGetPhyLvdsLinkData() argument 1091 Hi35xxGetMipiImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize) Hi35xxGetMipiImgsizeStatis() argument 1097 Hi35xxGetLvdsImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize) Hi35xxGetLvdsImgsizeStatis() argument 1103 Hi35xxGetLvdsLaneImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short lane, ImgSize *pSize) Hi35xxGetLvdsLaneImgsizeStatis() argument 1178 struct MipiCsiCntlr *cntlr = NULL; Hi35xxMipiCsiRelease() local [all...] |
/device/soc/rockchip/rk2206/hdf_driver/i2c/ |
H A D | i2c_driver.c | 265 static int32_t i2cdrv_transfer(struct I2cCntlr *cntlr, struct I2cMsg *msgs, int16_t count)
in i2cdrv_transfer() argument 278 if (cntlr == NULL) {
in i2cdrv_transfer() 279 PRINT_ERR("%s: cntlr is null\n", __func__);
in i2cdrv_transfer() 282 if (cntlr->priv == NULL) {
in i2cdrv_transfer() 283 PRINT_ERR("%s: cntlr->priv is null\n", __func__);
in i2cdrv_transfer() 291 bus = (struct i2c_bus *)cntlr->priv;
in i2cdrv_transfer() 350 struct I2cCntlr *cntlr = NULL;
in i2cdrv_init() local 359 cntlr = (struct I2cCntlr *)OsalMemAlloc(sizeof(struct I2cCntlr));
in i2cdrv_init() 362 if (cntlr == NULL) {
in i2cdrv_init() 363 PRINT_ERR("%s: cntlr i in i2cdrv_init() 453 struct I2cCntlr *cntlr = NULL; i2cdrv_release() local [all...] |
/device/soc/hisilicon/common/platform/mmc/himci_v200/ |
H A D | himci.c | 53 static void HimciSetEmmcDrvCap(struct MmcCntlr *cntlr) in HimciSetEmmcDrvCap() argument 63 if (cntlr->curDev->workPara.timing == BUS_TIMING_MMC_HS200) { in HimciSetEmmcDrvCap() 65 } else if (cntlr->curDev->workPara.timing == BUS_TIMING_MMC_HS) { in HimciSetEmmcDrvCap() 68 if (cntlr->curDev->workPara.clock == 400000) { in HimciSetEmmcDrvCap() 88 static void HimciSetSdDrvCap(struct MmcCntlr *cntlr) in HimciSetSdDrvCap() argument 100 if (cntlr->curDev->workPara.timing == BUS_TIMING_UHS_SDR104) { in HimciSetSdDrvCap() 102 } else if (cntlr->curDev->workPara.timing == BUS_TIMING_UHS_SDR50) { in HimciSetSdDrvCap() 104 } else if (cntlr->curDev->workPara.timing == BUS_TIMING_UHS_SDR25) { in HimciSetSdDrvCap() 106 } else if (cntlr->curDev->workPara.timing == BUS_TIMING_UHS_SDR12) { in HimciSetSdDrvCap() 108 } else if (cntlr in HimciSetSdDrvCap() 127 HimciSetSdioDrvCap(struct MmcCntlr *cntlr) HimciSetSdioDrvCap() argument 166 HimciSetDrvCap(struct MmcCntlr *cntlr) HimciSetDrvCap() argument 302 HimciNeedAutoStop(struct MmcCntlr *cntlr) HimciNeedAutoStop() argument 564 HimciCardPlugged(struct MmcCntlr *cntlr) HimciCardPlugged() argument 765 HimciCmdDatePrepare(struct MmcCntlr *cntlr, struct MmcCmd *cmd, struct HimciHost *host) HimciCmdDatePrepare() argument 795 HimciDoRequest(struct MmcCntlr *cntlr, struct MmcCmd *cmd) HimciDoRequest() argument 895 HimciSetClock(struct MmcCntlr *cntlr, uint32_t clock) HimciSetClock() argument 934 HimciSetPowerMode(struct MmcCntlr *cntlr, enum MmcPowerMode mode) HimciSetPowerMode() argument 954 HimciSetBusWidth(struct MmcCntlr *cntlr, enum MmcBusWidth width) HimciSetBusWidth() argument 1013 HimciSetBusTiming(struct MmcCntlr *cntlr, enum MmcBusTiming timing) HimciSetBusTiming() argument 1039 HimciSetSdioIrq(struct MmcCntlr *cntlr, bool enable) HimciSetSdioIrq() argument 1062 HimciHardwareReset(struct MmcCntlr *cntlr) HimciHardwareReset() argument 1085 HimciSetEnhanceStrobe(struct MmcCntlr *cntlr, bool enable) HimciSetEnhanceStrobe() argument 1092 HimciVoltageSwitchTo3v3(struct MmcCntlr *cntlr, struct HimciHost *host) HimciVoltageSwitchTo3v3() argument 1107 HimciVoltageSwitchTo1v8(struct MmcCntlr *cntlr, struct HimciHost *host) HimciVoltageSwitchTo1v8() argument 1156 HimciSwitchVoltage(struct MmcCntlr *cntlr, enum MmcVolt volt) HimciSwitchVoltage() argument 1173 HimciDevReadOnly(struct MmcCntlr *cntlr) HimciDevReadOnly() argument 1190 HimciDevBusy(struct MmcCntlr *cntlr) HimciDevBusy() argument 1242 HimciSendTuning(struct MmcCntlr *cntlr, uint32_t opcode) HimciSendTuning() argument 1278 HimciTuningFeedback(struct MmcCntlr *cntlr) HimciTuningFeedback() argument 1459 HimciTune(struct MmcCntlr *cntlr, uint32_t cmdCode) HimciTune() argument 1605 HimciRescanSdioDev(struct MmcCntlr *cntlr) HimciRescanSdioDev() argument 1621 HimciSystemInit(struct MmcCntlr *cntlr) HimciSystemInit() argument 1768 HimciHostInit(struct HimciHost *host, struct MmcCntlr *cntlr) HimciHostInit() argument 1849 struct MmcCntlr *cntlr = NULL; HimciDeleteHost() local 1885 struct MmcCntlr *cntlr = NULL; HimciMmcBind() local 1955 struct MmcCntlr *cntlr = NULL; HimciMmcRelease() local [all...] |
/device/soc/rockchip/rk2206/hardware/include/lz_hardware/ |
H A D | base.h | 29 CNTLR_S *cntlr; \ 37 cntlr = &g_cntlrs[id]; \ 38 if (cntlr->init) { \ 45 CNTLR_S *cntlr; \ 53 cntlr = &g_cntlrs[id]; \ 54 if (!cntlr->init) { \ 61 CNTLR_S *cntlr; \ 72 cntlr = &g_cntlrs[bank]; \ 73 if (!cntlr->init) { \ 74 if (finit(cntlr) ! [all...] |
/device/soc/rockchip/rk2206/hdf_driver/spi/ |
H A D | spi_driver.c | 373 static int32_t spidrv_open(struct SpiCntlr *cntlr)
in spidrv_open() argument 378 if (cntlr == NULL) {
in spidrv_open() 379 PRINT_ERR("%s: cntlr is null\n", __func__);
in spidrv_open() 382 if (cntlr->priv == NULL) {
in spidrv_open() 383 PRINT_ERR("%s: cntlr->priv is null\n", __func__);
in spidrv_open() 387 params = (struct spi_params *)cntlr->priv;
in spidrv_open() 398 static int32_t spidrv_close(struct SpiCntlr *cntlr)
in spidrv_close() argument 402 if (cntlr == NULL) {
in spidrv_close() 403 PRINT_ERR("%s: cntlr is null\n", __func__);
in spidrv_close() 406 if (cntlr in spidrv_close() 419 spidrv_setcfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) spidrv_setcfg() argument 495 spidrv_getcfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) spidrv_getcfg() argument 534 spidrv_transfer(struct SpiCntlr *cntlr, struct SpiMsg *msgs, uint32_t count) spidrv_transfer() argument 605 struct SpiCntlr *cntlr = NULL; spidrv_init() local 673 struct SpiCntlr *cntlr = NULL; spidrv_release() local [all...] |
/device/soc/rockchip/rk2206/hdf_driver/gpio/ |
H A D | gpio_driver.c | 67 static int32_t iodrv_setdir(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t dir)
in iodrv_setdir() argument 69 if (cntlr == NULL) {
in iodrv_setdir() 70 PRINT_ERR("%s: cntlr is null", __func__);
in iodrv_setdir() 73 if (gpio >= cntlr->count) {
in iodrv_setdir() 74 PRINT_ERR("%s: gpio(%d) >= cntlr->count(%d)", __func__, gpio, cntlr->count);
in iodrv_setdir() 91 static int32_t iodrv_getdir(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t *dir)
in iodrv_getdir() argument 93 if (cntlr == NULL) {
in iodrv_getdir() 94 PRINT_ERR("%s: cntlr is null", __func__);
in iodrv_getdir() 97 if (gpio >= cntlr in iodrv_getdir() 123 iodrv_write(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t value) iodrv_write() argument 144 iodrv_read(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t *value) iodrv_read() argument 229 struct GpioCntlr *cntlr = &m_gpioCntlr; iodrv_init() local 275 struct Gpiocntlr *cntlr; iodrv_release() local [all...] |
/device/soc/hisilicon/common/platform/pin/ |
H A D | pin_hi35xx.c | 39 struct PinCntlr cntlr; member 104 static int32_t Hi35xxPinSetPull(struct PinCntlr *cntlr, uint32_t index, enum PinPullType pullType) in Hi35xxPinSetPull() argument 109 hi35xx = (struct Hi35xxPinCntlr *)cntlr; in Hi35xxPinSetPull() 117 static int32_t Hi35xxPinGetPull(struct PinCntlr *cntlr, uint32_t index, enum PinPullType *pullType) in Hi35xxPinGetPull() argument 121 hi35xx = (struct Hi35xxPinCntlr *)cntlr; in Hi35xxPinGetPull() 129 static int32_t Hi35xxPinSetStrength(struct PinCntlr *cntlr, uint32_t index, uint32_t strength) in Hi35xxPinSetStrength() argument 134 hi35xx = (struct Hi35xxPinCntlr *)cntlr; in Hi35xxPinSetStrength() 142 static int32_t Hi35xxPinGetStrength(struct PinCntlr *cntlr, uint32_t index, uint32_t *strength) in Hi35xxPinGetStrength() argument 146 hi35xx = (struct Hi35xxPinCntlr *)cntlr; in Hi35xxPinGetStrength() 154 static int32_t Hi35xxPinSetFunc(struct PinCntlr *cntlr, uint32_ argument 178 Hi35xxPinGetFunc(struct PinCntlr *cntlr, uint32_t index, const char **funcName) Hi35xxPinGetFunc() argument 390 struct PinCntlr *cntlr = NULL; Hi35xxPinRelease() local [all...] |
/device/soc/hisilicon/common/platform/gpio/ |
H A D | gpio_hi35xx.c | 50 struct GpioCntlr cntlr; member 142 static int32_t Pl061GpioSetDir(struct GpioCntlr *cntlr, uint16_t local, uint16_t dir) in Pl061GpioSetDir() argument 147 struct Pl061GpioGroup *group = (struct Pl061GpioGroup *)cntlr; in Pl061GpioSetDir() 167 static int32_t Pl061GpioGetDir(struct GpioCntlr *cntlr, uint16_t local, uint16_t *dir) in Pl061GpioGetDir() argument 172 struct Pl061GpioGroup *group = (struct Pl061GpioGroup *)cntlr; in Pl061GpioGetDir() 186 static int32_t Pl061GpioWrite(struct GpioCntlr *cntlr, uint16_t local, uint16_t val) in Pl061GpioWrite() argument 191 struct Pl061GpioGroup *group = (struct Pl061GpioGroup *)cntlr; in Pl061GpioWrite() 209 static int32_t Pl061GpioRead(struct GpioCntlr *cntlr, uint16_t local, uint16_t *val) in Pl061GpioRead() argument 214 struct Pl061GpioGroup *group = (struct Pl061GpioGroup *)cntlr; in Pl061GpioRead() 250 for (i = 0; i < group->cntlr in Pl061IrqHandleNoShare() 316 Pl061GpioEnableIrq(struct GpioCntlr *cntlr, uint16_t local) Pl061GpioEnableIrq() argument 329 Pl061GpioDisableIrq(struct GpioCntlr *cntlr, uint16_t local) Pl061GpioDisableIrq() argument 380 Pl061GpioSetIrq(struct GpioCntlr *cntlr, uint16_t local, uint16_t mode) Pl061GpioSetIrq() argument 404 Pl061GpioUnsetIrq(struct GpioCntlr *cntlr, uint16_t local) Pl061GpioUnsetIrq() argument [all...] |
/device/soc/hisilicon/common/platform/mmc/sdhci/ |
H A D | sdhci.c | 446 static bool SdhciCardPlugged(struct MmcCntlr *cntlr) in SdhciCardPlugged() argument 450 if ((cntlr == NULL) || (cntlr->priv == NULL)) { in SdhciCardPlugged() 454 if (cntlr->devType == MMC_DEV_SDIO || cntlr->devType == MMC_DEV_EMMC) { in SdhciCardPlugged() 458 host = (struct SdhciHost *)cntlr->priv; in SdhciCardPlugged() 541 static int32_t SdhciDoRequest(struct MmcCntlr *cntlr, struct MmcCmd *cmd) in SdhciDoRequest() argument 543 struct SdhciHost *host = (struct SdhciHost *)cntlr->priv; in SdhciDoRequest() 888 static int32_t SdhciSetClock(struct MmcCntlr *cntlr, uint32_t clock) in SdhciSetClock() argument 890 struct SdhciHost *host = (struct SdhciHost *)cntlr in SdhciSetClock() 1019 SdhciSetPowerMode(struct MmcCntlr *cntlr, enum MmcPowerMode mode) SdhciSetPowerMode() argument 1046 SdhciSetBusWidth(struct MmcCntlr *cntlr, enum MmcBusWidth width) SdhciSetBusWidth() argument 1095 SdhciSetBusTiming(struct MmcCntlr *cntlr, enum MmcBusTiming timing) SdhciSetBusTiming() argument 1137 SdhciSetSdioIrq(struct MmcCntlr *cntlr, bool enable) SdhciSetSdioIrq() argument 1158 SdhciHardwareReset(struct MmcCntlr *cntlr) SdhciHardwareReset() argument 1170 SdhciSystemInit(struct MmcCntlr *cntlr) SdhciSystemInit() argument 1184 SdhciSetEnhanceStrobe(struct MmcCntlr *cntlr, bool enable) SdhciSetEnhanceStrobe() argument 1207 SdhciSwitchVoltage(struct MmcCntlr *cntlr, enum MmcVolt volt) SdhciSwitchVoltage() argument 1230 SdhciDevReadOnly(struct MmcCntlr *cntlr) SdhciDevReadOnly() argument 1249 SdhciDevBusy(struct MmcCntlr *cntlr) SdhciDevBusy() argument 1438 SdhciTune(struct MmcCntlr *cntlr, uint32_t cmdCode) SdhciTune() argument 1490 SdhciRescanSdioDev(struct MmcCntlr *cntlr) SdhciRescanSdioDev() argument 1526 struct MmcCntlr *cntlr = NULL; SdhciDeleteHost() local 1967 SdhciHostInit(struct SdhciHost *host, struct MmcCntlr *cntlr) SdhciHostInit() argument 2016 struct MmcCntlr *cntlr = NULL; SdhciMmcBind() local 2085 struct MmcCntlr *cntlr = NULL; SdhciMmcRelease() local [all...] |
/device/soc/hisilicon/common/platform/spi/ |
H A D | spi_hi35xx.c | 35 struct SpiCntlr *cntlr; member 465 static int32_t Pl022SetCfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) in Pl022SetCfg() argument 470 if (cntlr == NULL || cntlr->priv == NULL || cfg == NULL) { in Pl022SetCfg() 471 HDF_LOGE("%s: cntlr priv or cfg is NULL", __func__); in Pl022SetCfg() 474 pl022 = (struct Pl022 *)cntlr->priv; in Pl022SetCfg() 475 dev = Pl022FindDeviceByCsNum(pl022, cntlr->curCs); in Pl022SetCfg() 495 static int32_t Pl022GetCfg(struct SpiCntlr *cntlr, struct SpiCfg *cfg) in Pl022GetCfg() argument 500 if (cntlr == NULL || cntlr in Pl022GetCfg() 539 static struct DmaCntlr *cntlr = NULL; GetDmaCntlr() local 654 Pl022Transfer(struct SpiCntlr *cntlr, struct SpiMsg *msg, uint32_t count) Pl022Transfer() argument 694 Pl022Open(struct SpiCntlr *cntlr) Pl022Open() argument 700 Pl022Close(struct SpiCntlr *cntlr) Pl022Close() argument 882 Pl022Init(struct SpiCntlr *cntlr, const struct HdfDeviceObject *device) Pl022Init() argument 960 struct SpiCntlr *cntlr = NULL; HdfSpiDeviceInit() local 987 struct SpiCntlr *cntlr = NULL; HdfSpiDeviceRelease() local [all...] |
/device/soc/hisilicon/common/platform/mipi_dsi/ |
H A D | mipi_tx_hi35xx.c | 581 static ComboDevCfgTag *GetDevCfg(struct MipiDsiCntlr *cntlr) in GetDevCfg() argument 586 if (cntlr == NULL) { in GetDevCfg() 587 HDF_LOGE("%s: cntlr is NULL!", __func__); in GetDevCfg() 590 dev.devno = cntlr->devNo; in GetDevCfg() 591 dev.outputMode = (OutPutModeTag)cntlr->cfg.mode; in GetDevCfg() 592 dev.videoMode = (VideoModeTag)cntlr->cfg.burstMode; in GetDevCfg() 593 dev.outputFormat = (OutputFormatTag)cntlr->cfg.format; in GetDevCfg() 594 dev.syncInfo.vidPktSize = cntlr->cfg.timing.xPixels; in GetDevCfg() 595 dev.syncInfo.vidHsaPixels = cntlr->cfg.timing.hsaPixels; in GetDevCfg() 596 dev.syncInfo.vidHbpPixels = cntlr in GetDevCfg() 1137 Hi35xxSetCntlrCfg(struct MipiDsiCntlr *cntlr) Hi35xxSetCntlrCfg() argument 1183 Hi35xxSetCmd(struct MipiDsiCntlr *cntlr, struct DsiCmdDesc *cmd) Hi35xxSetCmd() argument 1249 Hi35xxGetCmd(struct MipiDsiCntlr *cntlr, struct DsiCmdDesc *cmd, uint32_t readLen, uint8_t *out) Hi35xxGetCmd() argument 1266 Hi35xxToLp(struct MipiDsiCntlr *cntlr) Hi35xxToLp() argument 1272 Hi35xxToHs(struct MipiDsiCntlr *cntlr) Hi35xxToHs() argument 1314 struct MipiDsiCntlr *cntlr = NULL; Hi35xxMipiTxRelease() local [all...] |