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Searched refs:clocks (Results 1 - 14 of 14) sorted by relevance

/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/platform/devicetree/
H A Dmali_kbase_runtime_pm.c45 if (WARN_ON(kbdev->clocks[i] == NULL)) in enable_gpu_power_control()
47 else if (!__clk_is_enabled(kbdev->clocks[i])) in enable_gpu_power_control()
48 WARN_ON(clk_prepare_enable(kbdev->clocks[i])); in enable_gpu_power_control()
57 if (WARN_ON(kbdev->clocks[i] == NULL)) in disable_gpu_power_control()
59 else if (__clk_is_enabled(kbdev->clocks[i])) { in disable_gpu_power_control()
60 clk_disable_unprepare(kbdev->clocks[i]); in disable_gpu_power_control()
61 WARN_ON(__clk_is_enabled(kbdev->clocks[i])); in disable_gpu_power_control()
H A Dmali_kbase_clk_rate_trace.c42 return kbdev->clocks[index]; in enumerate_gpu_clk()
/device/soc/rockchip/common/sdk_linux/drivers/iommu/
H A Drockchip-iommu.c139 struct clk_bulk_data *clocks; member
739 if (WARN_ON(clk_bulk_enable(iommu->num_clocks, iommu->clocks))) { in rk_iommu_irq()
798 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_irq()
883 WARN_ON(clk_bulk_enable(iommu->num_clocks, iommu->clocks)); in rk_iommu_zap_iova()
885 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_zap_iova()
1264 WARN_ON(clk_bulk_enable(iommu->num_clocks, iommu->clocks)); in rk_iommu_flush_tlb_all()
1268 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_flush_tlb_all()
1288 WARN_ON(clk_bulk_enable(iommu->num_clocks, iommu->clocks)); in rk_iommu_disable()
1296 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_disable()
1323 ret = clk_bulk_enable(iommu->num_clocks, iommu->clocks); in rk_iommu_enable()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_devfreq.c167 /* Regulators and clocks work in pairs: every clock has a regulator, in kbase_devfreq_target()
168 * and we never expect to have more regulators than clocks. in kbase_devfreq_target()
201 if (kbdev->clocks[i]) { in kbase_devfreq_target()
204 err = clk_set_rate(kbdev->clocks[i], freqs[i]); in kbase_devfreq_target()
398 * regulators and clocks from the device tree, as well as parsing in kbase_devfreq_init_core_mask_table()
647 if (kbdev->clocks[i]) { in kbase_devfreq_init()
648 kbdev->current_freqs[i] = clk_get_rate(kbdev->clocks[i]); in kbase_devfreq_init()
H A Dmali_kbase_pm_backend.c227 /* Turn clocks and interrupts on - no-op if we haven't done a previous in kbase_pm_do_poweron()
302 * case, as the clocks to GPU were not withdrawn yet). in kbase_pm_gpu_poweroff_wait_wq()
336 struct clk *clk = kbdev->clocks[0]; in kbase_pm_l2_clock_slow()
384 struct clk *clk = kbdev->clocks[0]; in kbase_pm_l2_clock_normalize()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/platform/rk/
H A Dmali_kbase_config_rk.c373 struct clk *clock = kbdev->clocks[i]; in rk_pm_enable_clk()
393 struct clk *clock = kbdev->clocks[i]; in rk_pm_disable_clk()
577 return kbdev->clocks[index]; in enumerate_gpu_clk()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/platform/rk/
H A Dmali_kbase_config_rk.c322 struct clk *clock = kbdev->clocks[i]; in rk_pm_enable_clk()
343 struct clk *clock = kbdev->clocks[i]; in rk_pm_disable_clk()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_devfreq.c428 * regulators and clocks from the device tree, as well as parsing in kbase_devfreq_init_core_mask_table()
692 if (kbdev->clocks[i]) in kbase_devfreq_init()
694 clk_get_rate(kbdev->clocks[i]); in kbase_devfreq_init()
698 if (strstr(__clk_get_name(kbdev->clocks[0]), "scmi")) in kbase_devfreq_init()
699 kbdev->scmi_clk = kbdev->clocks[0]; in kbase_devfreq_init()
H A Dmali_kbase_pm_backend.c252 /* Turn clocks and interrupts on - no-op if we haven't done a previous in kbase_pm_do_poweron()
337 * case, as the clocks to GPU were not withdrawn yet). in pm_handle_power_off()
396 struct clk *clk = kbdev->clocks[0]; in kbase_pm_l2_clock_slow()
441 struct clk *clk = kbdev->clocks[0]; in kbase_pm_l2_clock_normalize()
617 "Failed to turn off GPU clocks on synchronous power off, MMU faults pending"); in kbase_pm_do_poweroff_sync()
1195 /* Disable interrupts and turn off the GPU clocks */ in kbase_pm_handle_runtime_suspend()
1197 dev_warn(kbdev->dev, "Failed to turn off GPU clocks on runtime suspend, MMU faults pending"); in kbase_pm_handle_runtime_suspend()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_core_linux.c4097 * regulators and clocks from the device tree, as well as parsing in power_control_init()
4147 /* Having more clocks than regulators is acceptable, while the in power_control_init()
4152 * all clocks and regulators will be released before returning. in power_control_init()
4155 * operating with a partial initialization of clocks. in power_control_init()
4158 kbdev->clocks[i] = of_clk_get(kbdev->dev->of_node, i); in power_control_init()
4159 if (IS_ERR_OR_NULL(kbdev->clocks[i])) { in power_control_init()
4160 err = PTR_ERR(kbdev->clocks[i]); in power_control_init()
4161 kbdev->clocks[i] = NULL; in power_control_init()
4165 err = clk_prepare(kbdev->clocks[i]); in power_control_init()
4169 clk_put(kbdev->clocks[ in power_control_init()
[all...]
H A Dmali_kbase_defs.h637 * @clocks: Pointer to the input clock resources referenced by
639 * @nr_clocks: Number of clocks set in the clocks array.
890 struct clk *clocks[BASE_MAX_NR_CLOCKS_REGULATORS]; member
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_core_linux.c4409 * regulators and clocks from the device tree, as well as parsing in power_control_init()
4458 /* Having more clocks than regulators is acceptable, while the in power_control_init()
4463 * all clocks and regulators will be released before returning. in power_control_init()
4466 * operating with a partial initialization of clocks. in power_control_init()
4469 kbdev->clocks[i] = of_clk_get(kbdev->dev->of_node, i); in power_control_init()
4470 if (IS_ERR_OR_NULL(kbdev->clocks[i])) { in power_control_init()
4471 err = PTR_ERR(kbdev->clocks[i]); in power_control_init()
4472 kbdev->clocks[i] = NULL; in power_control_init()
4476 err = clk_prepare(kbdev->clocks[i]); in power_control_init()
4481 clk_put(kbdev->clocks[ in power_control_init()
[all...]
H A Dmali_kbase_defs.h152 * While, the number of clocks could be more than regulators,
671 * @clocks: Pointer to the input clock resources referenced by
674 * @nr_clocks: Number of clocks set in the clocks array.
975 struct clk *clocks[BASE_MAX_NR_CLOCKS_REGULATORS]; member
/device/soc/rockchip/common/sdk_linux/scripts/dtc/
H A Dchecks.c1538 WARNING_PROPERTY_PHANDLE_CELLS(clocks, "clocks", "#clock-cells");

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