clk_dclk_set_rate (reference) in projects: device - OpenGrok search results

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Searched refs:clk_dclk_set_rate (Results 1 - 2 of 2) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/clk/
H A D	clk-dclk-divider.c	`42 static int clk_dclk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) in clk_dclk_set_rate() function 78 .set_rate = clk_dclk_set_rate,`
/device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/
H A D	clk-dclk-divider.c	`41 static int clk_dclk_set_rate(struct clk_hw *hw, unsigned long rate, in clk_dclk_set_rate() function 77 .set_rate = clk_dclk_set_rate,`

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