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Searched refs:clk_cnt (Results 1 - 22 of 22) sorted by relevance

/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_vinstr.c196 u8 clk_cnt; in kbasep_vinstr_client_dump() local
233 clk_cnt = vcli->vctx->metadata->clk_cnt; in kbasep_vinstr_client_dump()
238 meta->cycles.top = (clk_cnt > 0) ? dump_buf->clk_cnt_buf[0] : 0; in kbasep_vinstr_client_dump()
240 (clk_cnt > 1) ? dump_buf->clk_cnt_buf[1] : 0; in kbasep_vinstr_client_dump()
442 vcli->enable_map.clk_enable_map = (1ull << vctx->metadata->clk_cnt) - 1; in kbasep_vinstr_client_create()
933 u8 clk_cnt = cli->vctx->metadata->clk_cnt; in kbasep_vinstr_hwcnt_reader_ioctl_get_api_version() local
940 if (clk_cnt > 0) in kbasep_vinstr_hwcnt_reader_ioctl_get_api_version()
943 if (clk_cnt > in kbasep_vinstr_hwcnt_reader_ioctl_get_api_version()
[all...]
H A Dmali_kbase_hwcnt_gpu_narrow.c98 .clk_cnt = src_md->clk_cnt, in kbase_hwcnt_gpu_metadata_narrow_create()
141 sizeof(*dump_buf->clk_cnt_buf) * md_narrow->metadata->clk_cnt; in kbase_hwcnt_dump_buffer_narrow_alloc()
184 md_narrow->metadata->clk_cnt; in kbase_hwcnt_dump_buffer_narrow_array_alloc()
322 for (clk = 0; clk < metadata_narrow->metadata->clk_cnt; clk++) { in kbase_hwcnt_dump_buffer_copy_strict_narrow()
H A Dmali_kbase_hwcnt_types.c45 if (desc->clk_cnt > (sizeof(u64) * BITS_PER_BYTE)) in kbase_hwcnt_metadata_create()
151 metadata->clk_cnt = desc->clk_cnt; in kbase_hwcnt_metadata_create()
215 clk_cnt_buf_bytes = sizeof(*dump_buf->clk_cnt_buf) * metadata->clk_cnt; in kbase_hwcnt_dump_buffer_alloc()
255 sizeof(*dump_bufs->bufs->clk_cnt_buf) * metadata->clk_cnt; in kbase_hwcnt_dump_buffer_array_alloc()
335 sizeof(*dst->clk_cnt_buf) * metadata->clk_cnt); in kbase_hwcnt_dump_buffer_zero()
347 sizeof(*dst->clk_cnt_buf) * dst->metadata->clk_cnt); in kbase_hwcnt_dump_buffer_zero_strict()
H A Dmali_kbase_hwcnt_types.h156 * @clk_cnt: The number of clock domains in the system. The maximum is 64.
162 u8 clk_cnt; member
242 * @clk_cnt: The number of clock domains in the system.
250 u8 clk_cnt; member
685 dst->clk_enable_map = (1ull << dst->metadata->clk_cnt) - 1; in kbase_hwcnt_enable_map_enable_all()
782 (1ull << enable_map->metadata->clk_cnt) - 1; in kbase_hwcnt_enable_map_any_enabled()
784 if (enable_map->metadata->clk_cnt > 0 && in kbase_hwcnt_enable_map_any_enabled()
1196 for ((clk) = 0; (clk) < (md)->clk_cnt; (clk)++)
H A Dmali_kbase_hwcnt_backend_csf_if_fw.c78 * @clk_cnt: The number of clock domains in the system.
87 u8 clk_cnt; member
239 prfcnt_info->clk_cnt = 1; in kbasep_hwcnt_backend_csf_if_fw_get_prfcnt_info()
278 prfcnt_info->clk_cnt = fw_ctx->clk_cnt; in kbasep_hwcnt_backend_csf_if_fw_get_prfcnt_info()
714 for (clk = 0; clk < fw_ctx->clk_cnt; clk++) { in kbasep_hwcnt_backend_csf_if_fw_get_gpu_cycle_count()
773 ctx->clk_cnt = clk; in kbasep_hwcnt_backend_csf_if_fw_ctx_create()
H A Dmali_kbase_kinstr_prfcnt.c461 u8 clk_cnt, i; in kbasep_kinstr_prfcnt_set_sample_metadata() local
463 clk_cnt = cli->kinstr_ctx->metadata->clk_cnt; in kbasep_kinstr_prfcnt_set_sample_metadata()
473 if (clk_cnt > MAX_REPORTED_DOMAINS) in kbasep_kinstr_prfcnt_set_sample_metadata()
474 clk_cnt = MAX_REPORTED_DOMAINS; in kbasep_kinstr_prfcnt_set_sample_metadata()
479 ptr_md->u.clock_md.num_domains = clk_cnt; in kbasep_kinstr_prfcnt_set_sample_metadata()
480 for (i = 0; i < clk_cnt; i++) in kbasep_kinstr_prfcnt_set_sample_metadata()
1233 clk_cnt_buf_bytes = sizeof(*dump_buf->clk_cnt_buf) * metadata->clk_cnt; in kbasep_kinstr_prfcnt_get_sample_size()
1472 sizeof(*samples->dump_buf.clk_cnt_buf) * metadata->clk_cnt; in kbasep_kinstr_prfcnt_sample_array_alloc()
1860 (1ull << kinstr_ctx->metadata->clk_cnt) in kbasep_kinstr_prfcnt_client_create()
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H A Dmali_kbase_hwcnt_backend_csf_if.h63 * @clk_cnt: Clock domain count in the system.
72 u8 clk_cnt; member
H A Dmali_kbase_hwcnt_gpu.h135 * @clk_cnt: Number of clock domains available.
142 u8 clk_cnt; member
H A Dmali_kbase_hwcnt_gpu.c203 desc.clk_cnt = gpu_info->clk_cnt; in kbasep_hwcnt_backend_gpu_metadata_create()
H A Dmali_kbase_hwcnt_backend_csf.c1956 if (csf_info->prfcnt_info.clk_cnt > BASE_MAX_NR_CLOCKS_REGULATORS) in kbase_hwcnt_backend_csf_metadata_init()
1961 gpu_info.clk_cnt = csf_info->prfcnt_info.clk_cnt; in kbase_hwcnt_backend_csf_metadata_init()
H A Dmali_kbase_hwcnt_backend_jm.c169 info->clk_cnt = clk; in kbasep_hwcnt_backend_jm_gpu_info_init()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_vinstr.c180 u8 clk_cnt; in kbasep_vinstr_client_dump() local
213 clk_cnt = vcli->vctx->metadata->clk_cnt; in kbasep_vinstr_client_dump()
218 meta->cycles.top = (clk_cnt > 0) ? dump_buf->clk_cnt_buf[0] : 0; in kbasep_vinstr_client_dump()
219 meta->cycles.shader_cores = (clk_cnt > 1) ? dump_buf->clk_cnt_buf[1] : 0; in kbasep_vinstr_client_dump()
414 vcli->enable_map.clk_enable_map = (1ull << vctx->metadata->clk_cnt) - 1; in kbasep_vinstr_client_create()
879 u8 clk_cnt = cli->vctx->metadata->clk_cnt; in kbasep_vinstr_hwcnt_reader_ioctl_get_api_version() local
889 if (clk_cnt > 0) { in kbasep_vinstr_hwcnt_reader_ioctl_get_api_version()
892 if (clk_cnt > in kbasep_vinstr_hwcnt_reader_ioctl_get_api_version()
[all...]
H A Dmali_kbase_hwcnt_types.c57 if (desc->clk_cnt > (sizeof(u64) * BITS_PER_BYTE)) { in kbase_hwcnt_metadata_create()
151 metadata->clk_cnt = desc->clk_cnt; in kbase_hwcnt_metadata_create()
216 clk_cnt_buf_bytes = sizeof(*dump_buf->clk_cnt_buf) * metadata->clk_cnt; in kbase_hwcnt_dump_buffer_alloc()
258 clk_cnt_buf_bytes = sizeof(*dump_bufs->bufs->clk_cnt_buf) * metadata->clk_cnt; in kbase_hwcnt_dump_buffer_array_alloc()
334 memset(dst->clk_cnt_buf, 0, sizeof(*dst->clk_cnt_buf) * metadata->clk_cnt); in kbase_hwcnt_dump_buffer_zero()
346 memset(dst->clk_cnt_buf, 0, sizeof(*dst->clk_cnt_buf) * dst->metadata->clk_cnt); in kbase_hwcnt_dump_buffer_zero_strict()
H A Dmali_kbase_hwcnt_types.h139 * @clk_cnt: The number of clock domains in the system. The maximum is 64.
145 u8 clk_cnt; member
225 * @clk_cnt: The number of clock domains in the system.
233 u8 clk_cnt; member
561 dst->clk_enable_map = (1ull << dst->metadata->clk_cnt) - 1; in kbase_hwcnt_enable_map_enable_all()
646 const u64 clk_enable_map_mask = (1ull << enable_map->metadata->clk_cnt) - 1; in kbase_hwcnt_enable_map_any_enabled()
648 if (enable_map->metadata->clk_cnt > 0 && (enable_map->clk_enable_map & clk_enable_map_mask)) { in kbase_hwcnt_enable_map_any_enabled()
1045 #define kbase_hwcnt_metadata_for_each_clock(md, clk) for ((clk) = 0; (clk) < (md)->clk_cnt; (clk)++)
H A Dmali_kbase_hwcnt_gpu.h80 * @clk_cnt: Number of clock domains available.
85 u8 clk_cnt; member
H A Dmali_kbase_hwcnt_gpu.c123 desc.clk_cnt = v5_info->clk_cnt; in kbasep_hwcnt_backend_gpu_metadata_v5_create()
178 info->v5.clk_cnt = clk; in kbase_hwcnt_gpu_info_init()
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-pvtm.c96 u32 clk_cnt, check_cnt; in rockchip_clock_pvtm_get_value() local
99 clk_cnt = time_us * 0x18; in rockchip_clock_pvtm_get_value()
101 regmap_write(pvtm->grf, info->con + 0x4, clk_cnt); in rockchip_clock_pvtm_get_value()
/device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/
H A Dclk-pvtm.c98 u32 clk_cnt, check_cnt; in rockchip_clock_pvtm_get_value() local
101 clk_cnt = time_us * 24; in rockchip_clock_pvtm_get_value()
103 regmap_write(pvtm->grf, info->con + 0x4, clk_cnt); in rockchip_clock_pvtm_get_value()
/device/soc/rockchip/common/vendor/drivers/rockchip/
H A Drockchip_pvtm.c279 unsigned int clk_cnt, check_cnt = 0x64; in rockchip_pvtm_get_value() local
307 clk_cnt = time_us * 0x18; in rockchip_pvtm_get_value()
308 regmap_write(pvtm->grf, pvtm->con + info->reg_cal, clk_cnt); in rockchip_pvtm_get_value()
348 unsigned int clk_cnt, check_cnt = 0x64; in rv1126_pvtm_get_value() local
376 clk_cnt = time_us * 0x18; in rv1126_pvtm_get_value()
377 writel_relaxed(clk_cnt, pvtm->base + pvtm->con + info->reg_cal); in rv1126_pvtm_get_value()
/device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/
H A Drockchip_pvtm.c293 unsigned int clk_cnt, check_cnt = 100; in rockchip_pvtm_get_value() local
321 clk_cnt = time_us * 24; in rockchip_pvtm_get_value()
322 regmap_write(pvtm->grf, pvtm->con + info->reg_cal, clk_cnt); in rockchip_pvtm_get_value()
367 unsigned int clk_cnt, check_cnt = 100; in rv1126_pvtm_get_value() local
395 clk_cnt = time_us * 24; in rv1126_pvtm_get_value()
396 writel_relaxed(clk_cnt, pvtm->base + pvtm->con + info->reg_cal); in rv1126_pvtm_get_value()
/device/soc/rockchip/common/vendor/drivers/pci/
H A Dpcie-dw-rockchip.c133 unsigned int clk_cnt; member
945 clk_bulk_disable(rk_pcie->clk_cnt, rk_pcie->clks); in rk_pcie_clk_deinit()
946 clk_bulk_unprepare(rk_pcie->clk_cnt, rk_pcie->clks); in rk_pcie_clk_deinit()
966 rk_pcie->clk_cnt = count; in rk_pcie_clk_init()
1633 clk_bulk_disable(rk_pcie->clk_cnt, rk_pcie->clks); in rockchip_dw_pcie_suspend()
1653 ret = clk_bulk_enable(rk_pcie->clk_cnt, rk_pcie->clks); in rockchip_dw_pcie_resume()
1655 clk_bulk_unprepare(rk_pcie->clk_cnt, rk_pcie->clks); in rockchip_dw_pcie_resume()
/device/soc/rockchip/rk3588/kernel/drivers/pci/controller/dwc/
H A Dpcie-dw-rockchip.c146 unsigned int clk_cnt; member
1090 clk_bulk_disable(rk_pcie->clk_cnt, rk_pcie->clks); in rk_pcie_clk_deinit()
1091 clk_bulk_unprepare(rk_pcie->clk_cnt, rk_pcie->clks); in rk_pcie_clk_deinit()
1111 rk_pcie->clk_cnt = count; in rk_pcie_clk_init()
1912 clk_bulk_disable(rk_pcie->clk_cnt, rk_pcie->clks); in rockchip_dw_pcie_suspend()
1932 ret = clk_bulk_enable(rk_pcie->clk_cnt, rk_pcie->clks); in rockchip_dw_pcie_resume()
1934 clk_bulk_unprepare(rk_pcie->clk_cnt, rk_pcie->clks); in rockchip_dw_pcie_resume()

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