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Searched refs:chan (Results 1 - 25 of 44) sorted by relevance

12

/device/soc/rockchip/common/sdk_linux/net/bluetooth/
H A Dl2cap_sock.c85 struct l2cap_chan *chan = l2cap_pi(sk)->chan; in l2cap_sock_bind() local
135 bacpy(&chan->src, &la.l2_bdaddr); in l2cap_sock_bind()
136 chan->src_type = la.l2_bdaddr_type; in l2cap_sock_bind()
139 err = l2cap_add_scid(chan, __le16_to_cpu(la.l2_cid)); in l2cap_sock_bind()
141 err = l2cap_add_psm(chan, &la.l2_bdaddr, la.l2_psm); in l2cap_sock_bind()
148 switch (chan->chan_type) { in l2cap_sock_bind()
151 chan->sec_level = BT_SECURITY_SDP; in l2cap_sock_bind()
156 chan->sec_level = BT_SECURITY_SDP; in l2cap_sock_bind()
160 chan in l2cap_sock_bind()
187 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_init_pid() local
198 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_connect() local
289 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_listen() local
406 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_getname() local
433 l2cap_get_mode(struct l2cap_chan *chan) l2cap_get_mode() argument
454 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_getsockopt_old() local
575 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_getsockopt() local
734 l2cap_valid_mtu(struct l2cap_chan *chan, u16 mtu) l2cap_valid_mtu() argument
755 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_setsockopt_old() local
875 l2cap_set_mode(struct l2cap_chan *chan, u8 mode) l2cap_set_mode() argument
922 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_setsockopt() local
1171 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_sendmsg() local
1289 __l2cap_wait_ack(struct sock *sk, struct l2cap_chan *chan) __l2cap_wait_ack() argument
1336 struct l2cap_chan *chan; l2cap_sock_shutdown() local
1443 struct l2cap_chan *chan; l2cap_sock_release() local
1476 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_cleanup_listen() local
1492 l2cap_sock_new_connection_cb(struct l2cap_chan *chan) l2cap_sock_new_connection_cb() argument
1522 l2cap_sock_recv_cb(struct l2cap_chan *chan, struct sk_buff *skb) l2cap_sock_recv_cb() argument
1566 l2cap_sock_close_cb(struct l2cap_chan *chan) l2cap_sock_close_cb() argument
1573 l2cap_sock_teardown_cb(struct l2cap_chan *chan, int err) l2cap_sock_teardown_cb() argument
1623 l2cap_sock_state_change_cb(struct l2cap_chan *chan, int state, int err) l2cap_sock_state_change_cb() argument
1634 l2cap_sock_alloc_skb_cb(struct l2cap_chan *chan, unsigned long hdr_len, unsigned long len, int nb) l2cap_sock_alloc_skb_cb() argument
1656 l2cap_sock_ready_cb(struct l2cap_chan *chan) l2cap_sock_ready_cb() argument
1677 l2cap_sock_defer_cb(struct l2cap_chan *chan) l2cap_sock_defer_cb() argument
1691 l2cap_sock_resume_cb(struct l2cap_chan *chan) l2cap_sock_resume_cb() argument
1704 l2cap_sock_set_shutdown_cb(struct l2cap_chan *chan) l2cap_sock_set_shutdown_cb() argument
1713 l2cap_sock_get_sndtimeo_cb(struct l2cap_chan *chan) l2cap_sock_get_sndtimeo_cb() argument
1720 l2cap_sock_get_peer_pid_cb(struct l2cap_chan *chan) l2cap_sock_get_peer_pid_cb() argument
1727 l2cap_sock_suspend_cb(struct l2cap_chan *chan) l2cap_sock_suspend_cb() argument
1735 l2cap_sock_filter(struct l2cap_chan *chan, struct sk_buff *skb) l2cap_sock_filter() argument
1793 struct l2cap_chan *chan = l2cap_pi(sk)->chan; l2cap_sock_init() local
1862 struct l2cap_chan *chan; l2cap_sock_alloc() local
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/device/soc/rockchip/common/sdk_linux/include/linux/
H A Ddmaengine.h322 * @device_node: used to add this to the device chan list
358 * @chan: driver channel device
363 struct dma_chan *chan; member
517 static inline const char *dma_chan_name(struct dma_chan *chan) in dma_chan_name() argument
519 return dev_name(&chan->dev->device); in dma_chan_name()
526 * @chan: channel to be reviewed
535 typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
585 * @chan: target channel for this operation
604 struct dma_chan *chan; member
875 int (*device_alloc_chan_resources)(struct dma_chan *chan);
928 dmaengine_slave_config(struct dma_chan *chan, struct dma_slave_config *config) dmaengine_slave_config() argument
942 dmaengine_prep_slave_single(struct dma_chan *chan, dma_addr_t buf, size_t len, enum dma_transfer_direction dir, unsigned long flags) dmaengine_prep_slave_single() argument
958 dmaengine_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long flags) dmaengine_prep_slave_sg() argument
972 dmaengine_prep_rio_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long flags, struct rio_dma_ext *rio_ext) dmaengine_prep_rio_sg() argument
985 dmaengine_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction dir, unsigned long flags) dmaengine_prep_dma_cyclic() argument
998 dmaengine_prep_interleaved_dma(struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags) dmaengine_prep_interleaved_dma() argument
1010 dmaengine_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value, size_t len, unsigned long flags) dmaengine_prep_dma_memset() argument
1020 dmaengine_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) dmaengine_prep_dma_memcpy() argument
1030 dmaengine_is_metadata_mode_supported(struct dma_chan *chan, enum dma_desc_metadata_mode mode) dmaengine_is_metadata_mode_supported() argument
1066 dmaengine_terminate_all(struct dma_chan *chan) dmaengine_terminate_all() argument
1096 dmaengine_terminate_async(struct dma_chan *chan) dmaengine_terminate_async() argument
1123 dmaengine_synchronize(struct dma_chan *chan) dmaengine_synchronize() argument
1146 dmaengine_terminate_sync(struct dma_chan *chan) dmaengine_terminate_sync() argument
1160 dmaengine_pause(struct dma_chan *chan) dmaengine_pause() argument
1169 dmaengine_resume(struct dma_chan *chan) dmaengine_resume() argument
1178 dmaengine_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *state) dmaengine_tx_status() argument
1379 dma_async_issue_pending(struct dma_chan *chan) dma_async_issue_pending() argument
1395 dma_async_is_tx_complete(struct dma_chan *chan, dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) dma_async_is_tx_complete() argument
1464 dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) dma_sync_wait() argument
1488 dma_release_channel(struct dma_chan *chan) dma_release_channel() argument
1491 dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) dma_get_slave_caps() argument
1556 struct dma_chan *chan; dma_request_slave_channel_compat() local
[all...]
H A Dstmmac.h128 u32 chan; member
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/include/
H A Dvou_hal.h41 hi_bool hal_disp_set_intf_enable(hal_disp_outputchannel chan, hi_bool intf);
42 hi_bool hal_disp_get_intf_enable(hal_disp_outputchannel chan, hi_bool *intf_en);
44 hi_bool hal_disp_get_int_state(hal_disp_outputchannel chan, hi_bool *bottom);
45 hi_bool hal_disp_get_int_state_vcnt(hal_disp_outputchannel chan, hi_u32 *vcnt);
46 hi_bool hal_disp_set_intf_sync(hal_disp_outputchannel chan,
51 hi_bool hal_disp_set_intf_mux_sel(hal_disp_outputchannel chan, hal_disp_intf intf);
52 hi_bool hal_disp_set_intf_clip(hal_disp_intf chan, hi_bool clip, hal_disp_clip *clip_data);
53 hi_bool hal_disp_set_vt_thd_mode(hal_disp_outputchannel chan, hi_u32 u_field_mode);
54 hi_bool hal_disp_get_vtthd_mode(hal_disp_outputchannel chan, hi_bool *field_mode);
55 hi_bool hal_disp_set_vt_thd(hal_disp_outputchannel chan, hi_u3
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hifb/drv/hi3516cv500/
H A Dhifb_graphic_hal.h44 hi_bool hal_disp_set_intf_enable(hal_disp_outputchannel chan, hi_bool intf);
45 hi_bool fb_hal_disp_get_intf_enable(hal_disp_outputchannel chan, hi_bool *intf_en);
48 hi_bool fb_hal_disp_get_int_state(hal_disp_outputchannel chan, hi_bool *bottom);
49 hi_bool hal_disp_get_int_state_vblank(hal_disp_outputchannel chan, hi_bool *vblank);
50 hi_bool hal_disp_get_int_state_vback_blank(hal_disp_outputchannel chan, hi_bool *vback_blank);
51 hi_bool hal_disp_get_int_state_vcnt(hal_disp_outputchannel chan, hi_u32 *vcnt);
52 hi_bool hal_disp_set_intf_sync(hal_disp_outputchannel chan, hal_disp_syncinfo *sync_info);
56 hi_bool fb_hal_disp_get_disp_iop(hal_disp_outputchannel chan, hi_bool *iop);
57 hi_bool hal_disp_set_intf_mux_sel(hal_disp_outputchannel chan, hal_disp_intf intf);
58 hi_bool hal_disp_set_bt1120_sel(hal_disp_outputchannel chan);
[all...]
H A Dhifb_graphic_hal.c151 hi_ulong fb_vou_get_chn_abs_addr(hal_disp_outputchannel chan, hi_ulong reg) in fb_vou_get_chn_abs_addr() argument
155 switch (chan) { in fb_vou_get_chn_abs_addr()
158 reg_abs_addr = reg + (chan - HAL_DISP_CHANNEL_DHD0) * DHD_REGS_LEN; in fb_vou_get_chn_abs_addr()
168 static hi_u32 hal_get_addr_chnabs(hal_disp_outputchannel chan, volatile hi_u32 *value) in hal_get_addr_chnabs() argument
171 addr_reg = fb_vou_get_chn_abs_addr(chan, (hi_ulong)(uintptr_t)value); in hal_get_addr_chnabs()
204 hi_bool fb_hal_disp_get_intf_enable(hal_disp_outputchannel chan, hi_bool *intf_en) in fb_hal_disp_get_intf_enable() argument
209 switch (chan) { in fb_hal_disp_get_intf_enable()
212 addr_reg = fb_vou_get_chn_abs_addr(chan, (hi_ulong)(uintptr_t)&(g_hifb_reg->dhd0_ctrl.u32)); in fb_hal_disp_get_intf_enable()
224 hi_bool hal_disp_get_intf_sync(hal_disp_outputchannel chan, hal_disp_syncinfo *sync_info) in hal_disp_get_intf_sync() argument
234 switch (chan) { in hal_disp_get_intf_sync()
278 hal_disp_get_intf_mux_sel(hal_disp_outputchannel chan, VO_INTF_TYPE_E *intf_type) hal_disp_get_intf_mux_sel() argument
309 fb_hal_disp_get_int_state(hal_disp_outputchannel chan, hi_bool *bottom) fb_hal_disp_get_int_state() argument
333 fb_hal_disp_get_disp_iop(hal_disp_outputchannel chan, hi_bool *iop) fb_hal_disp_get_disp_iop() argument
353 hal_disp_get_vt_thd_mode(hal_disp_outputchannel chan, hi_bool *field_mode) hal_disp_get_vt_thd_mode() argument
473 fb_hal_disp_set_reg_up(hal_disp_outputchannel chan) fb_hal_disp_set_reg_up() argument
495 fb_hal_disp_get_reg_up(hal_disp_outputchannel chan) fb_hal_disp_get_reg_up() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/hal/
H A Dvou_hal.c121 hi_ulong vou_get_chn_abs_addr(hal_disp_outputchannel chan, hi_ulong reg) in vou_get_chn_abs_addr() argument
125 switch (chan) { in vou_get_chn_abs_addr()
128 reg_abs_addr = reg + (chan - HAL_DISP_CHANNEL_DHD0) * DHD_REGS_LEN; in vou_get_chn_abs_addr()
260 hi_bool hal_disp_set_intf_enable(hal_disp_outputchannel chan, hi_bool intf) in hal_disp_set_intf_enable() argument
265 switch (chan) { in hal_disp_set_intf_enable()
268 addr_reg = vou_get_chn_abs_addr(chan, (hi_uintptr_t) & (g_vo_reg->DHD0_CTRL.u32)); in hal_disp_set_intf_enable()
284 hi_bool hal_disp_get_intf_enable(hal_disp_outputchannel chan, hi_bool *intf_en) in hal_disp_get_intf_enable() argument
289 switch (chan) { in hal_disp_get_intf_enable()
292 addr_reg = vou_get_chn_abs_addr(chan, (hi_uintptr_t) & (g_vo_reg->DHD0_CTRL.u32)); in hal_disp_get_intf_enable()
306 hi_bool hal_disp_get_int_state(hal_disp_outputchannel chan, hi_boo argument
328 hal_disp_get_int_state_vcnt(hal_disp_outputchannel chan, hi_u32 *vcnt) hal_disp_get_int_state_vcnt() argument
345 hal_disp_set_intf_sync(hal_disp_outputchannel chan, hal_disp_syncinfo *sync_info, hal_disp_syncinv *inv) hal_disp_set_intf_sync() argument
504 hal_disp_set_intf_mux_sel(hal_disp_outputchannel chan, hal_disp_intf intf) hal_disp_set_intf_mux_sel() argument
580 hal_disp_set_vt_thd_mode(hal_disp_outputchannel chan, hi_u32 field_mode) hal_disp_set_vt_thd_mode() argument
602 hal_disp_get_vtthd_mode(hal_disp_outputchannel chan, hi_bool *field_mode) hal_disp_get_vtthd_mode() argument
623 hal_disp_set_vt_thd(hal_disp_outputchannel chan, hi_u32 vtthd, hi_u32 vtthd2) hal_disp_set_vt_thd() argument
732 hal_disp_set_reg_up(hal_disp_outputchannel chan) hal_disp_set_reg_up() argument
749 hal_disp_get_reg_up(hal_disp_outputchannel chan) hal_disp_get_reg_up() argument
761 hal_disp_set_dither_round_unlim(hal_disp_outputchannel chan, hi_u32 dither_round_unlim) hal_disp_set_dither_round_unlim() argument
784 hal_disp_set_dither_data_in_out(hal_disp_outputchannel chan, hi_u32 i_data_width_dither, hi_u32 o_data_width_dither) hal_disp_set_dither_data_in_out() argument
809 hal_disp_set_dither_en(hal_disp_outputchannel chan, hi_u32 dither_en) hal_disp_set_dither_en() argument
832 hal_disp_set_dither_mode(hal_disp_outputchannel chan, hi_u32 mode) hal_disp_set_dither_mode() argument
855 hal_disp_set_dither_round(hal_disp_outputchannel chan, hi_u32 dither_round) hal_disp_set_dither_round() argument
878 hal_disp_set_dither_domain_mode(hal_disp_outputchannel chan, hi_u32 domain_mode) hal_disp_set_dither_domain_mode() argument
901 hal_disp_set_dither_tap_mode(hal_disp_outputchannel chan, hi_u32 tap_mode) hal_disp_set_dither_tap_mode() argument
924 hal_disp_set_dither_sed(hal_disp_outputchannel chan, hal_disp_dihter_sed *dither_sed) hal_disp_set_dither_sed() argument
1045 hal_disp_set_dither_thr_min_max(hal_disp_outputchannel chan, hi_u32 thr_min, hi_u32 thr_max) hal_disp_set_dither_thr_min_max() argument
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac_dma.h136 void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
137 void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
138 void dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan);
139 void dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan);
140 void dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan);
141 void dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan);
143 u32 chan);
H A Ddwmac-rk-tool.c727 u32 chan = 0; in __dwmac_rk_loopback_run() local
747 for (chan = 0; chan < rx_channels_count; chan++) in __dwmac_rk_loopback_run()
748 stmmac_start_rx(priv, priv->ioaddr, chan); in __dwmac_rk_loopback_run()
749 for (chan = 0; chan < tx_channels_count; chan++) in __dwmac_rk_loopback_run()
750 stmmac_start_tx(priv, priv->ioaddr, chan); in __dwmac_rk_loopback_run()
784 for (chan in __dwmac_rk_loopback_run()
1081 u32 chan = 0; dwmac_rk_init_dma_engine() local
1132 u32 chan = 0; dwmac_rk_dma_operation_mode() local
1166 u32 chan; dwmac_rk_rx_queue_dma_chan_map() local
[all...]
H A Dhwif.h176 struct stmmac_dma_cfg *dma_cfg, u32 chan);
179 dma_addr_t phy, u32 chan);
182 dma_addr_t phy, u32 chan);
195 void (*enable_dma_irq)(void __iomem *ioaddr, u32 chan,
197 void (*disable_dma_irq)(void __iomem *ioaddr, u32 chan,
199 void (*start_tx)(void __iomem *ioaddr, u32 chan);
200 void (*stop_tx)(void __iomem *ioaddr, u32 chan);
201 void (*start_rx)(void __iomem *ioaddr, u32 chan);
202 void (*stop_rx)(void __iomem *ioaddr, u32 chan);
204 struct stmmac_extra_stats *x, u32 chan);
[all...]
/device/soc/hisilicon/common/platform/dmac/
H A Ddmac_hi35xx.c78 static int HiDmacIsrErrProc(struct DmaCntlr *cntlr, uint16_t chan) in HiDmacIsrErrProc() argument
83 chanErrStats[ERROR_STATUS_NUM_0] = (chanErrStats[ERROR_STATUS_NUM_0] >> chan) & 0x01; in HiDmacIsrErrProc()
85 chanErrStats[ERROR_STATUS_NUM_1] = (chanErrStats[ERROR_STATUS_NUM_1] >> chan) & 0x01; in HiDmacIsrErrProc()
87 chanErrStats[ERROR_STATUS_NUM_2] = (chanErrStats[ERROR_STATUS_NUM_2] >> chan) & 0x01; in HiDmacIsrErrProc()
91 chan, chanErrStats[ERROR_STATUS_NUM_0], chanErrStats[ERROR_STATUS_NUM_1], in HiDmacIsrErrProc()
93 OSAL_WRITEL(1 << chan, cntlr->remapBase + HIDMAC_INT_ERR1_RAW_OFFSET); in HiDmacIsrErrProc()
95 OSAL_WRITEL(1 << chan, cntlr->remapBase + HIDMAC_INT_ERR2_RAW_OFFSET); in HiDmacIsrErrProc()
97 OSAL_WRITEL(1 << chan, cntlr->remapBase + HIDMAC_INT_ERR3_RAW_OFFSET); in HiDmacIsrErrProc()
104 static int HiDmacGetChanStat(struct DmaCntlr *cntlr, uint16_t chan) in HiDmacGetChanStat() argument
111 if ((chanStatus >> chan) in HiDmacGetChanStat()
[all...]
/device/soc/rockchip/common/vendor/drivers/net/ethernet/
H A Ddwmac-rk-tool.c707 u32 chan = 0; in dwmac_rk_loopback_run_first() local
729 for (chan = 0; chan < rx_channels_count; chan++) { in dwmac_rk_loopback_run_first()
730 stmmac_start_rx(priv, priv->ioaddr, chan); in dwmac_rk_loopback_run_first()
732 for (chan = 0; chan < tx_channels_count; chan++) { in dwmac_rk_loopback_run_first()
733 stmmac_start_tx(priv, priv->ioaddr, chan); in dwmac_rk_loopback_run_first()
768 for (chan in dwmac_rk_loopback_run_first()
1039 u32 chan = 0; dwmac_rk_init_dma_engine() local
1086 u32 chan = 0; dwmac_rk_dma_operation_mode() local
1122 u32 chan; dwmac_rk_rx_queue_dma_chan_map() local
[all...]
/device/soc/rockchip/rk3566/sdk_linux/drivers/iio/adc/
H A Drockchip_saradc.c71 static int rockchip_saradc_conversion(struct rockchip_saradc *info, struct iio_chan_spec const *chan) in rockchip_saradc_conversion() argument
78 info->last_chan = chan; in rockchip_saradc_conversion()
81 writel(SARADC_CTRL_POWER_CTRL | (chan->channel & SARADC_CTRL_CHN_MASK) | SARADC_CTRL_IRQ_ENABLE, in rockchip_saradc_conversion()
91 static int rockchip_saradc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, in rockchip_saradc_read_raw() argument
106 ret = rockchip_saradc_conversion(info, chan); in rockchip_saradc_read_raw()
123 *val2 = chan->scan_type.realbits; in rockchip_saradc_read_raw()
289 const struct iio_chan_spec *chan = &i_dev->channels[i]; in rockchip_saradc_trigger_handler() local
291 ret = rockchip_saradc_conversion(info, chan); in rockchip_saradc_trigger_handler()
/device/board/hihope/rk3568/audio_drivers/headset_monitor/src/
H A Danalog_headset_adc.c52 struct iio_channel *chan; member
110 hs->chan = pdata->chan; in InitHeadsetPriv()
177 if (pdata->chan != NULL) { in ReportCurrentState()
283 ret = iio_read_channel_raw(hs->chan, &val); in HookOnceWork()
358 ret = iio_read_channel_raw(hs->chan, &val); in HookWorkCallback()
428 if (pdata->chan != NULL) { // this is always true. in InitWorkData()
H A Danalog_headset_core.c307 pdata->chan = iio_channel_get(&pdev->dev, NULL); in AnalogHeadsetInit()
308 if (IS_ERR(pdata->chan)) { in AnalogHeadsetInit()
309 pdata->chan = NULL; in AnalogHeadsetInit()
310 AUDIO_DEVICE_LOG_WARNING("have not set adc chan."); in AnalogHeadsetInit()
320 if (pdata->chan != NULL) { /* hook adc mode */ in AnalogHeadsetInit()
378 if (g_pdataInfo->chan != NULL) { in AudioHeadsetSuspend()
386 if (g_pdataInfo->chan != NULL) { in AudioHeadsetResume()
477 if (drvData->chan != NULL) { // hook adc mode in HdfHeadsetExit()
/device/board/hihope/rk3568/wifi/bcmdhd_wifi6/hdfadapt/
H A Dhdf_bdh_mac80211.c530 params->chan = ieee80211_get_channel_khz(wiphy, MHZ_TO_KHZ(center_freq)); in FillActionParamFreq()
531 if (params->chan == NULL) { in FillActionParamFreq()
724 struct ieee80211_channel *chan = NULL; in FillAllValidChannels() local
737 chan = &wiphy->bands[band]->channels[loop]; in FillAllValidChannels()
738 if ((chan->flags & WIFI_CHAN_DISABLED) != 0) { in FillAllValidChannels()
741 request->channels[count++] = chan; in FillAllValidChannels()
752 struct ieee80211_channel *chan = NULL; in WifiScanSetChannel() local
760 chan = GetChannelByFreq(wiphy, (uint16_t)(params->freqs[loop])); in WifiScanSetChannel()
761 if (chan == NULL) { in WifiScanSetChannel()
770 request->channels[count++] = chan; in WifiScanSetChannel()
1212 struct ieee80211_channel *chan = NULL; SetupWireLessDev() local
[all...]
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/oal/
H A Doal_cfg80211.c63 hi_u64 cookie, oal_ieee80211_channel_stru *chan, hi_u32 duration, oal_gfp_enum_uint8 en_gfp) in oal_cfg80211_ready_on_channel()
67 cfg80211_ready_on_channel(wdev, cookie, chan, duration, en_gfp); in oal_cfg80211_ready_on_channel()
71 cfg80211_ready_on_channel(pst_net_dev, cookie, chan, en_channel_type, duration, en_gfp); in oal_cfg80211_ready_on_channel()
76 hi_unref_param(chan); in oal_cfg80211_ready_on_channel()
57 oal_cfg80211_ready_on_channel( oal_wireless_dev *wdev, hi_u64 cookie, oal_ieee80211_channel_stru *chan, hi_u32 duration, oal_gfp_enum_uint8 en_gfp) oal_cfg80211_ready_on_channel() argument
H A Doal_net.c454 if (GET_NET_DEV_CFG80211_WIRELESS(netdev)->preset_chandef.chan != HI_NULL) { in oal_net_clear_netdev()
455 OsalMemFree(GET_NET_DEV_CFG80211_WIRELESS(netdev)->preset_chandef.chan); in oal_net_clear_netdev()
456 GET_NET_DEV_CFG80211_WIRELESS(netdev)->preset_chandef.chan = HI_NULL; in oal_net_clear_netdev()
H A Doal_cfg80211.h74 hi_u64 ull_cookie, oal_ieee80211_channel_stru *chan, hi_u32 duration, oal_gfp_enum_uint8 en_gfp);
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/wal/
H A Dwal_mac80211.c142 oal_ieee80211_channel *chan = NULL; in WifiScanSetChannel() local
151 chan = &wiphy->bands[band]->channels[loop]; in WifiScanSetChannel()
152 if ((chan->flags & WIFI_CHAN_DISABLED) != 0) { in WifiScanSetChannel()
155 request->channels[count++] = chan; in WifiScanSetChannel()
159 chan = GetChannelByFreq(wiphy, (uint16_t)(params->freqs[loop])); in WifiScanSetChannel()
160 if (chan == NULL) { in WifiScanSetChannel()
165 request->channels[count++] = chan; in WifiScanSetChannel()
314 if (GET_NET_DEV_CFG80211_WIRELESS(netDev)->preset_chandef.chan == NULL) { in SetupWireLessDev()
315 GET_NET_DEV_CFG80211_WIRELESS(netDev)->preset_chandef.chan = in SetupWireLessDev()
317 if (GET_NET_DEV_CFG80211_WIRELESS(netDev)->preset_chandef.chan in SetupWireLessDev()
[all...]
H A Dwal_cfg80211.c419 [3]chan
448 hi_u32 wal_drv_remain_on_channel(oal_wiphy_stru *wiphy, oal_wireless_dev *wdev, oal_ieee80211_channel *chan, in wal_drv_remain_on_channel() argument
451 hi_s32 wal_drv_remain_on_channel(oal_wiphy_stru *wiphy, oal_wireless_dev *wdev, oal_ieee80211_channel *chan, in wal_drv_remain_on_channel()
456 if ((wiphy == HI_NULL) || (wdev == HI_NULL) || (chan == HI_NULL) || (pull_cookie == HI_NULL)) { in wal_drv_remain_on_channel()
457 oam_error_log0(0, OAM_SF_P2P, "{wal_drv_remain_on_channel::wiphy or wdev or chan or pull_cookie is NULL}"); in wal_drv_remain_on_channel()
485 hi_u16 us_center_freq = chan->center_freq; in wal_drv_remain_on_channel()
490 remain_on_channel.st_listen_channel = *chan; in wal_drv_remain_on_channel()
493 if ((hi_u8)chan->band == IEEE80211_BAND_2GHZ) { in wal_drv_remain_on_channel()
496 oam_warning_log1(0, OAM_SF_P2P, "{wal_drv_remain_on_channel::wrong band type[%d]!}\r\n", chan->band); in wal_drv_remain_on_channel()
519 cfg80211_ready_on_channel(wdev, *pull_cookie, chan, duratio in wal_drv_remain_on_channel()
544 wal_cfg80211_remain_on_channel(oal_wiphy_stru *wiphy, oal_wireless_dev *wdev, oal_ieee80211_channel *chan, hi_u32 duration, hi_u64 *pull_cookie) wal_cfg80211_remain_on_channel() argument
4637 oal_ieee80211_channel *chan = HI_NULL; wal_check_cookie_timeout() local
4822 wal_cfg80211_mgmt_tx_parameter_check(oal_wiphy_stru *wiphy, oal_wireless_dev *wdev, oal_ieee80211_channel *chan, const hi_u8 *puc_buf, hi_u64 *pull_cookie) wal_check_cookie_timeout() argument
4859 wal_cfg80211_mgmt_tx(oal_wiphy_stru *wiphy, oal_wireless_dev *wdev, oal_ieee80211_channel *chan, const hi_u8 *puc_buf, hi_u32 len, hi_u64 *pull_cookie) wal_check_cookie_timeout() argument
[all...]
H A Dwal_scan.c196 hi_u8 chan = scanned_bss->bss_dscr_info.channel.chan_number; in wal_inform_all_bss() local
200 if (mac_is_channel_num_valid(band, chan) != HI_SUCCESS) { in wal_inform_all_bss()
201 oam_warning_log2(vap_id, OAM_SF_SCAN, "{wal_inform_all_bss::chan=%d,band=%d not in regdomain}", chan, band); in wal_inform_all_bss()
218 scanned_bss_info.s_freq = (hi_s16)oal_ieee80211_channel_to_frequency(chan, band); in wal_inform_all_bss()
/device/soc/hisilicon/hi3861v100/hi3861_adapter/hals/communication/wifi_lite/wifiservice/source/
H A Dwifi_device.c727 static WifiErrorCode StaConnect(unsigned int chan, hi_wifi_assoc_request *assocReq, int pskType) in StaConnect() argument
733 if (chan == 0) { in StaConnect()
737 fastReq.channel = chan; in StaConnect()
801 unsigned int chan = FrequencyToChannel(g_wifiConfigs[networkId].freq); in ConnectTo() local
805 if (StaConnect(chan, &assocReq, g_wifiConfigs[networkId].wapiPskType) != WIFI_SUCCESS) { in ConnectTo()
/device/board/hihope/rk3568/audio_drivers/headset_monitor/include/
H A Danalog_headset.h87 struct iio_channel *chan; member
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/nouveau/
H A Dnouveau_drv.h154 struct nouveau_channel *chan; member
177 } chan; member

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