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Searched refs:bases (Results 1 - 6 of 6) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/video/rockchip/mpp/hack/
H A Dmpp_hack_px30.c49 status = readl(iommu->bases[i] + RK_MMU_STATUS); in mpp_iommu_is_paged()
57 return readl(iommu->bases[0] + RK_MMU_DTE_ADDR); in mpp_iommu_get_dte_addr()
71 writel(RK_MMU_CMD_ENABLE_STALL, iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
76 writel(RK_MMU_CMD_FORCE_RESET, iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
82 writel(iommu->dte_addr, iommu->bases[i] + RK_MMU_DTE_ADDR); in mpp_iommu_enable()
84 writel(RK_MMU_CMD_ZAP_CACHE, iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
86 writel(RK_MMU_IRQ_MASK, iommu->bases[i] + RK_MMU_INT_MASK); in mpp_iommu_enable()
91 writel(RK_MMU_CMD_ENABLE_PAGING, iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
96 writel(RK_MMU_CMD_DISABLE_STALL, iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
114 dte = readl(iommu->bases[ in mpp_iommu_disable()
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/mpp/hack/
H A Dmpp_hack_px30.c50 status = readl(iommu->bases[i] + RK_MMU_STATUS); in mpp_iommu_is_paged()
59 return readl(iommu->bases[0] + RK_MMU_DTE_ADDR); in mpp_iommu_get_dte_addr()
74 iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
79 iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
85 iommu->bases[i] + RK_MMU_DTE_ADDR); in mpp_iommu_enable()
88 iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
91 iommu->bases[i] + RK_MMU_INT_MASK); in mpp_iommu_enable()
97 iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
102 iommu->bases[i] + RK_MMU_COMMAND); in mpp_iommu_enable()
122 dte = readl(iommu->bases[ in mpp_iommu_disable()
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/iommu/
H A Drockchip-iommu.c136 void __iomem **bases; member
396 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command()
416 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
427 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & RK_MMU_STATUS_STALL_ACTIVE); in rk_iommu_is_stall_active()
439 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & RK_MMU_STATUS_PAGING_ENABLED); in rk_iommu_is_paging_enabled()
451 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0; in rk_iommu_is_reset_done()
488 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall()
525 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall()
562 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging()
600 rk_iommu_read(iommu->bases[ in rk_iommu_disable_paging()
[all...]
/device/soc/rockchip/common/vendor/drivers/video/rockchip/mpp/
H A Dmpp_iommu.h62 void __iomem *bases[2]; member
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/mpp/
H A Dmpp_iommu.h62 void __iomem *bases[2]; member
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c65 /* mmio bases table *must* be sorted in reverse gen order */
216 static u32 _engine_mmio_base(struct drm_i915_private *i915, const struct engine_mmio_base *bases) in _engine_mmio_base() argument
221 if (INTEL_GEN(i915) >= bases[i].gen) { in _engine_mmio_base()
227 GEM_BUG_ON(!bases[i].base); in _engine_mmio_base()
229 return bases[i].base; in _engine_mmio_base()

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