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Searched refs:as_nr (Results 1 - 25 of 89) sorted by relevance

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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_ctx_sched.c88 if ((kctx->as_nr != KBASEP_AS_NR_INVALID) && in kbasep_ctx_sched_find_as_for_ctx()
89 (kbdev->as_free & (1u << kctx->as_nr))) in kbasep_ctx_sched_find_as_for_ctx()
90 return kctx->as_nr; in kbasep_ctx_sched_find_as_for_ctx()
119 if (free_as != kctx->as_nr) { in kbase_ctx_sched_retain_ctx()
128 prev_kctx->as_nr = KBASEP_AS_NR_INVALID; in kbase_ctx_sched_retain_ctx()
130 kctx->as_nr = free_as; in kbase_ctx_sched_retain_ctx()
135 kctx->as_nr); in kbase_ctx_sched_retain_ctx()
143 WARN_ON(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbase_ctx_sched_retain_ctx()
147 return kctx->as_nr; in kbase_ctx_sched_retain_ctx()
156 WARN_ON(kctx->as_nr in kbase_ctx_sched_retain_ctx_refcount()
251 kbase_ctx_sched_as_to_ctx_refcount( struct kbase_device *kbdev, size_t as_nr) kbase_ctx_sched_as_to_ctx_refcount() argument
275 kbase_ctx_sched_as_to_ctx(struct kbase_device *kbdev, size_t as_nr) kbase_ctx_sched_as_to_ctx() argument
290 kbase_ctx_sched_as_to_ctx_nolock( struct kbase_device *kbdev, size_t as_nr) kbase_ctx_sched_as_to_ctx_nolock() argument
316 int as_nr; kbase_ctx_sched_inc_refcount_nolock() local
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H A Dmali_kbase_ctx_sched.h138 * @as_nr: address space assigned to the context of interest
152 * in as_nr.
155 struct kbase_device *kbdev, size_t as_nr);
161 * @as_nr: address space assigned to the context of interest
164 * indicating that no context was found in as_nr.
167 size_t as_nr);
173 * @as_nr: address space assigned to the context of interest
179 * indicating that no context was found in as_nr.
182 struct kbase_device *kbdev, size_t as_nr);
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_ctx_sched.c87 if ((kctx->as_nr != KBASEP_AS_NR_INVALID) && (kbdev->as_free & (1u << kctx->as_nr))) { in kbasep_ctx_sched_find_as_for_ctx()
88 return kctx->as_nr; in kbasep_ctx_sched_find_as_for_ctx()
118 if (free_as != kctx->as_nr) { in kbase_ctx_sched_retain_ctx()
125 prev_kctx->as_nr = KBASEP_AS_NR_INVALID; in kbase_ctx_sched_retain_ctx()
128 kctx->as_nr = free_as; in kbase_ctx_sched_retain_ctx()
131 kbase_mmu_update(kbdev, &kctx->mmu, kctx->as_nr); in kbase_ctx_sched_retain_ctx()
139 WARN_ON(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbase_ctx_sched_retain_ctx()
143 return kctx->as_nr; in kbase_ctx_sched_retain_ctx()
152 WARN_ON(kctx->as_nr in kbase_ctx_sched_retain_ctx_refcount()
240 kbase_ctx_sched_as_to_ctx_refcount(struct kbase_device *kbdev, size_t as_nr) kbase_ctx_sched_as_to_ctx_refcount() argument
266 kbase_ctx_sched_as_to_ctx(struct kbase_device *kbdev, size_t as_nr) kbase_ctx_sched_as_to_ctx() argument
297 int as_nr; kbase_ctx_sched_inc_refcount_nolock() local
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_kbase_ctx_sched.c75 if ((kctx->as_nr != KBASEP_AS_NR_INVALID) && (kbdev->as_free & (1u << kctx->as_nr))) { in kbasep_ctx_sched_find_as_for_ctx()
76 return kctx->as_nr; in kbasep_ctx_sched_find_as_for_ctx()
106 if (free_as != kctx->as_nr) { in kbase_ctx_sched_retain_ctx()
112 prev_kctx->as_nr = KBASEP_AS_NR_INVALID; in kbase_ctx_sched_retain_ctx()
115 kctx->as_nr = free_as; in kbase_ctx_sched_retain_ctx()
125 WARN_ON(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbase_ctx_sched_retain_ctx()
129 return kctx->as_nr; in kbase_ctx_sched_retain_ctx()
142 WARN_ON(kctx->as_nr == KBASEP_AS_NR_INVALID); in kbase_ctx_sched_retain_ctx_refcount()
143 WARN_ON(kbdev->as_to_kctx[kctx->as_nr] ! in kbase_ctx_sched_retain_ctx_refcount()
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H A Dmali_kbase_js.h265 * @return NULL on failure, indicating that no context was found in \a as_nr
267 struct kbase_context *kbasep_js_runpool_lookup_ctx(struct kbase_device *kbdev, int as_nr);
606 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_is_submit_allowed()
609 test_bit = (u16)(1u << kctx->as_nr); in kbasep_js_is_submit_allowed()
627 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_set_submit_allowed()
630 set_bit = (u16)(1u << kctx->as_nr); in kbasep_js_set_submit_allowed()
632 dev_dbg(kctx->kbdev->dev, "JS: Setting Submit Allowed on %p (as=%d)", kctx, kctx->as_nr); in kbasep_js_set_submit_allowed()
651 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_clear_submit_allowed()
654 clear_bit = (u16)(1u << kctx->as_nr); in kbasep_js_clear_submit_allowed()
657 dev_dbg(kctx->kbdev->dev, "JS: Clearing Submit Allowed on %p (as=%d)", kctx, kctx->as_nr); in kbasep_js_clear_submit_allowed()
775 kbasep_js_runpool_lookup_ctx_noretain(struct kbase_device *kbdev, int as_nr) kbasep_js_runpool_lookup_ctx_noretain() argument
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_kbase_ctx_sched.c76 if ((kctx->as_nr != KBASEP_AS_NR_INVALID) && in kbasep_ctx_sched_find_as_for_ctx()
77 (kbdev->as_free & (1u << kctx->as_nr))) in kbasep_ctx_sched_find_as_for_ctx()
78 return kctx->as_nr; in kbasep_ctx_sched_find_as_for_ctx()
107 if (free_as != kctx->as_nr) { in kbase_ctx_sched_retain_ctx()
114 prev_kctx->as_nr = KBASEP_AS_NR_INVALID; in kbase_ctx_sched_retain_ctx()
117 kctx->as_nr = free_as; in kbase_ctx_sched_retain_ctx()
127 WARN_ON(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbase_ctx_sched_retain_ctx()
131 return kctx->as_nr; in kbase_ctx_sched_retain_ctx()
143 WARN_ON(kctx->as_nr == KBASEP_AS_NR_INVALID); in kbase_ctx_sched_retain_ctx_refcount()
144 WARN_ON(kbdev->as_to_kctx[kctx->as_nr] ! in kbase_ctx_sched_retain_ctx_refcount()
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H A Dmali_kbase_js.h268 * @return NULL on failure, indicating that no context was found in \a as_nr
270 struct kbase_context *kbasep_js_runpool_lookup_ctx(struct kbase_device *kbdev, int as_nr);
613 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_is_submit_allowed()
616 test_bit = (u16) (1u << kctx->as_nr); in kbasep_js_is_submit_allowed()
634 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_set_submit_allowed()
637 set_bit = (u16) (1u << kctx->as_nr); in kbasep_js_set_submit_allowed()
639 dev_dbg(kctx->kbdev->dev, "JS: Setting Submit Allowed on %p (as=%d)", kctx, kctx->as_nr); in kbasep_js_set_submit_allowed()
658 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_clear_submit_allowed()
661 clear_bit = (u16) (1u << kctx->as_nr); in kbasep_js_clear_submit_allowed()
664 dev_dbg(kctx->kbdev->dev, "JS: Clearing Submit Allowed on %p (as=%d)", kctx, kctx->as_nr); in kbasep_js_clear_submit_allowed()
779 kbasep_js_runpool_lookup_ctx_noretain(struct kbase_device *kbdev, int as_nr) kbasep_js_runpool_lookup_ctx_noretain() argument
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/tl/backend/
H A Dmali_kbase_timeline_jm.c32 unsigned int as_nr; in kbase_create_timeline_objects() local
44 for (as_nr = 0; as_nr < kbdev->nr_hw_address_spaces; as_nr++) { in kbase_create_timeline_objects()
45 mali_kbase_kbase_tlstream_tl_new_as(summary, &kbdev->as[as_nr], as_nr); in kbase_create_timeline_objects()
57 for (as_nr = 0; as_nr < kbdev->nr_hw_address_spaces; as_nr++) { in kbase_create_timeline_objects()
58 mali_kbase_kbase_tlstream_tl_lifelink_as_gpu(summary, &kbdev->as[as_nr], kbde in kbase_create_timeline_objects()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/tl/backend/
H A Dmali_kbase_timeline_jm.c31 unsigned int as_nr; in kbase_create_timeline_objects() local
45 for (as_nr = 0; as_nr < kbdev->nr_hw_address_spaces; as_nr++) in kbase_create_timeline_objects()
46 __kbase_tlstream_tl_new_as(summary, &kbdev->as[as_nr], as_nr); in kbase_create_timeline_objects()
60 for (as_nr = 0; as_nr < kbdev->nr_hw_address_spaces; as_nr++) in kbase_create_timeline_objects()
62 &kbdev->as[as_nr], in kbase_create_timeline_objects()
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H A Dmali_kbase_timeline_csf.c32 unsigned int as_nr; in kbase_create_timeline_objects() local
55 for (as_nr = 0; as_nr < kbdev->nr_hw_address_spaces; as_nr++) in kbase_create_timeline_objects()
56 __kbase_tlstream_tl_new_as(summary, &kbdev->as[as_nr], as_nr); in kbase_create_timeline_objects()
65 for (as_nr = 0; as_nr < kbdev->nr_hw_address_spaces; as_nr++) in kbase_create_timeline_objects()
67 &kbdev->as[as_nr], in kbase_create_timeline_objects()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/mmu/backend/
H A Dmali_kbase_mmu_csf.c63 * @as_nr: Faulty address space
68 static void submit_work_pagefault(struct kbase_device *kbdev, u32 as_nr, in submit_work_pagefault() argument
72 struct kbase_as *const as = &kbdev->as[as_nr]; in submit_work_pagefault()
76 kctx = kbase_ctx_sched_as_to_ctx_nolock(kbdev, as_nr); in submit_work_pagefault()
96 as_nr); in submit_work_pagefault()
319 u32 status, u32 as_nr) in kbase_mmu_bus_fault_interrupt()
326 if (WARN_ON(as_nr == MCU_AS_NR)) in kbase_mmu_bus_fault_interrupt()
329 if (WARN_ON(as_nr >= BASE_MAX_NR_AS)) in kbase_mmu_bus_fault_interrupt()
332 as = &kbdev->as[as_nr]; in kbase_mmu_bus_fault_interrupt()
342 kbase_as_fault_debugfs_new(kbdev, as_nr); in kbase_mmu_bus_fault_interrupt()
318 kbase_mmu_bus_fault_interrupt(struct kbase_device *kbdev, u32 status, u32 as_nr) kbase_mmu_bus_fault_interrupt() argument
455 const u32 as_nr = faulting_as->number; kbase_mmu_gpu_fault_worker() local
508 submit_work_gpufault(struct kbase_device *kbdev, u32 status, u32 as_nr, u64 address) submit_work_gpufault() argument
534 kbase_mmu_gpu_fault_interrupt(struct kbase_device *kbdev, u32 status, u32 as_nr, u64 address, bool as_valid) kbase_mmu_gpu_fault_interrupt() argument
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/jm/
H A Dmali_kbase_jm_js.h700 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_is_submit_allowed()
703 test_bit = (u16) (1u << kctx->as_nr); in kbasep_js_is_submit_allowed()
707 is_allowed ? "is" : "isn't", (void *)kctx, kctx->as_nr); in kbasep_js_is_submit_allowed()
728 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_set_submit_allowed()
731 set_bit = (u16) (1u << kctx->as_nr); in kbasep_js_set_submit_allowed()
734 kctx, kctx->as_nr); in kbasep_js_set_submit_allowed()
758 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_clear_submit_allowed()
761 clear_bit = (u16) (1u << kctx->as_nr); in kbasep_js_clear_submit_allowed()
765 kctx, kctx->as_nr); in kbasep_js_clear_submit_allowed()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/jm/
H A Dmali_kbase_jm_js.h606 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_is_submit_allowed()
609 test_bit = (u16)(1u << kctx->as_nr); in kbasep_js_is_submit_allowed()
613 kctx->as_nr); in kbasep_js_is_submit_allowed()
630 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_set_submit_allowed()
633 set_bit = (u16)(1u << kctx->as_nr); in kbasep_js_set_submit_allowed()
635 dev_dbg(kctx->kbdev->dev, "JS: Setting Submit Allowed on %p (as=%d)", kctx, kctx->as_nr); in kbasep_js_set_submit_allowed()
655 KBASE_DEBUG_ASSERT(kctx->as_nr != KBASEP_AS_NR_INVALID); in kbasep_js_clear_submit_allowed()
658 clear_bit = (u16)(1u << kctx->as_nr); in kbasep_js_clear_submit_allowed()
661 dev_dbg(kctx->kbdev->dev, "JS: Clearing Submit Allowed on %p (as=%d)", kctx, kctx->as_nr); in kbasep_js_clear_submit_allowed()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/mmu/
H A Dmali_kbase_mmu.h109 size_t nr, unsigned long flags, int as_nr, int group_id);
113 int kbase_mmu_teardown_pages(struct kbase_device *kbdev, struct kbase_mmu_table *mmut, u64 vpfn, size_t nr, int as_nr);
125 * @as_nr: GPU address space for which the bus fault occurred.
129 int kbase_mmu_bus_fault_interrupt(struct kbase_device *kbdev, u32 status, u32 as_nr);
135 * @as_nr: Faulty address space
142 void kbase_mmu_gpu_fault_interrupt(struct kbase_device *kbdev, u32 status, u32 as_nr, u64 address, bool as_valid);
H A Dmali_kbase_mmu_mode_lpae.c86 static void mmu_update(struct kbase_device *kbdev, struct kbase_mmu_table *mmut, int as_nr) in mmu_update() argument
91 if (WARN_ON(as_nr == KBASEP_AS_NR_INVALID)) { in mmu_update()
95 as = &kbdev->as[as_nr]; in mmu_update()
104 static void mmu_disable_as(struct kbase_device *kbdev, int as_nr) in mmu_disable_as() argument
106 struct kbase_as *const as = &kbdev->as[as_nr]; in mmu_disable_as()
H A Dmali_kbase_mmu_mode_aarch64.c72 static void mmu_update(struct kbase_device *kbdev, struct kbase_mmu_table *mmut, int as_nr) in mmu_update() argument
77 if (WARN_ON(as_nr == KBASEP_AS_NR_INVALID)) { in mmu_update()
81 as = &kbdev->as[as_nr]; in mmu_update()
90 static void mmu_disable_as(struct kbase_device *kbdev, int as_nr) in mmu_disable_as() argument
92 struct kbase_as *const as = &kbdev->as[as_nr]; in mmu_disable_as()
H A Dmali_kbase_mmu_hw_direct.c87 static int wait_ready(struct kbase_device *kbdev, unsigned int as_nr) in wait_ready() argument
90 u32 val = kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS)); in wait_ready()
96 val = kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS)); in wait_ready()
107 kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS)); in wait_ready()
113 static int write_cmd(struct kbase_device *kbdev, int as_nr, u32 cmd) in write_cmd() argument
118 status = wait_ready(kbdev, as_nr); in write_cmd()
120 kbase_reg_write(kbdev, MMU_AS_REG(as_nr, AS_COMMAND), cmd); in write_cmd()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/device/backend/
H A Dmali_kbase_device_hw_csf.c36 * @as_nr: Faulty address space
42 u32 as_nr, bool as_valid) in kbase_report_gpu_fault()
53 kbase_mmu_gpu_fault_interrupt(kbdev, status, as_nr, address, as_valid); in kbase_report_gpu_fault()
61 const u32 as_nr = (status & GPU_FAULTSTATUS_JASID_MASK) >> in kbase_gpu_fault_interrupt() local
68 if (!as_valid || (as_nr == MCU_AS_NR)) { in kbase_gpu_fault_interrupt()
69 kbase_report_gpu_fault(kbdev, status, as_nr, as_valid); in kbase_gpu_fault_interrupt()
77 if (kbase_mmu_bus_fault_interrupt(kbdev, status, as_nr)) in kbase_gpu_fault_interrupt()
82 kbase_report_gpu_fault(kbdev, status, as_nr, as_valid); in kbase_gpu_fault_interrupt()
41 kbase_report_gpu_fault(struct kbase_device *kbdev, u32 status, u32 as_nr, bool as_valid) kbase_report_gpu_fault() argument
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/mmu/
H A Dmali_kbase_mmu.h138 unsigned long flags, int as_nr, int group_id,
147 size_t nr, int as_nr);
160 * @as_nr: GPU address space for which the bus fault occurred.
165 u32 as_nr);
171 * @as_nr: Faulty address space
179 u32 as_nr, u64 address, bool as_valid);
H A Dmali_kbase_mmu_mode_aarch64.c57 int as_nr) in mmu_update()
62 if (WARN_ON(as_nr == KBASEP_AS_NR_INVALID)) in mmu_update()
65 as = &kbdev->as[as_nr]; in mmu_update()
74 static void mmu_disable_as(struct kbase_device *kbdev, int as_nr) in mmu_disable_as() argument
76 struct kbase_as * const as = &kbdev->as[as_nr]; in mmu_disable_as()
56 mmu_update(struct kbase_device *kbdev, struct kbase_mmu_table *mmut, int as_nr) mmu_update() argument
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_jm_as.c92 int as_nr = kctx->as_nr; in kbase_backend_release_ctx_irq() local
94 if (as_nr == KBASEP_AS_NR_INVALID) { in kbase_backend_release_ctx_irq()
200 bool kbase_backend_use_ctx(struct kbase_device *kbdev, struct kbase_context *kctx, int as_nr) in kbase_backend_use_ctx() argument
215 new_address_space = &kbdev->as[as_nr]; in kbase_backend_use_ctx()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_jm_as.c83 int as_nr = kctx->as_nr; in kbase_backend_release_ctx_irq() local
85 if (as_nr == KBASEP_AS_NR_INVALID) { in kbase_backend_release_ctx_irq()
191 bool kbase_backend_use_ctx(struct kbase_device *kbdev, struct kbase_context *kctx, int as_nr) in kbase_backend_use_ctx() argument
205 new_address_space = &kbdev->as[as_nr]; in kbase_backend_use_ctx()
H A Dmali_kbase_mmu_hw_direct.c63 static int wait_ready(struct kbase_device *kbdev, unsigned int as_nr, struct kbase_context *kctx) in wait_ready() argument
66 u32 val = kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS), kctx); in wait_ready()
71 val = kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS), NULL); in wait_ready()
81 kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS), kctx); in wait_ready()
87 static int write_cmd(struct kbase_device *kbdev, int as_nr, u32 cmd, struct kbase_context *kctx) in write_cmd() argument
92 status = wait_ready(kbdev, as_nr, kctx); in write_cmd()
94 kbase_reg_write(kbdev, MMU_AS_REG(as_nr, AS_COMMAND), cmd, kctx); in write_cmd()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_jm_as.c95 int as_nr = kctx->as_nr; in kbase_backend_release_ctx_irq() local
97 if (as_nr == KBASEP_AS_NR_INVALID) { in kbase_backend_release_ctx_irq()
212 int as_nr) in kbase_backend_use_ctx()
227 new_address_space = &kbdev->as[as_nr]; in kbase_backend_use_ctx()
210 kbase_backend_use_ctx(struct kbase_device *kbdev, struct kbase_context *kctx, int as_nr) kbase_backend_use_ctx() argument
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_jm_as.c89 int as_nr = kctx->as_nr; in kbase_backend_release_ctx_irq() local
91 if (as_nr == KBASEP_AS_NR_INVALID) { in kbase_backend_release_ctx_irq()
207 int as_nr) in kbase_backend_use_ctx()
221 new_address_space = &kbdev->as[as_nr]; in kbase_backend_use_ctx()
205 kbase_backend_use_ctx(struct kbase_device *kbdev, struct kbase_context *kctx, int as_nr) kbase_backend_use_ctx() argument

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