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Searched refs:apll (Results 1 - 11 of 11) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3036.c26 apll, enumerator
122 PNAME(mux_busclk_p) = {"apll", "dpll_cpu", "gpll_cpu"};
124 PNAME(mux_pll_src_3plls_p) = {"apll", "dpll", "gpll"};
127 PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = {"apll", "dpll", "gpll", "usb480m"};
130 PNAME(mux_mmc_src_p) = {"apll", "dpll", "gpll", "xin24m"};
141 [apll] =
142 PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), RK2928_MODE_CON, 0, 5, 0, rk3036_pll_rates),
H A Dclk-rk3188.c25 apll, enumerator
197 PNAME(mux_aclk_cpu_p) = {"apll", "gpll"};
210 [apll] =
211 PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), RK2928_MODE_CON, 0, 5, 0, rk3188_pll_rates),
220 [apll] =
221 PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), RK2928_MODE_CON, 0, 6, 0, rk3188_pll_rates),
560 /* do not source aclk_cpu_pre from the apll, to keep complexity down */
675 /* reparent aclk_cpu_pre from apll */ in rk3188a_clk_init()
H A Dclk-rk3128.c24 apll, enumerator
153 [apll] =
154 PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), RK2928_MODE_CON, 0, 1, 0, rk3128_pll_rates),
203 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
H A Dclk-rk3328.c26 apll, enumerator
142 PNAME(mux_cpll_gpll_apll_p) = {"cpll", "gpll", "apll"};
149 PNAME(mux_ddrphy_p) = {"dpll", "apll", "cpll"};
174 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, 0, RK3328_PLL_CON(0), RK3328_MODE_CON, 0, 4, 0,
228 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 0, GFLAGS),
H A Dclk-rv1108.c23 apll, enumerator
118 PNAME(mux_pll_src_apll_gpll_p) = {"apll", "gpll"};
138 PNAME(mux_dsp_src_p) = {"dpll", "gpll", "apll", "usb480m"};
142 PNAME(mux_cvbs_src_p) = {"apll", "io_cvbs_clkin", "hdmiphy", "gpll"};
145 [apll] = PLL(pll_rk3399, PLL_APLL, "apll", mux_pll_p, 0, RV1108_PLL_CON(0), RV1108_PLL_CON(3), 8, 0, 0,
184 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(0), 0, GFLAGS),
390 GATE(0, "aclk_bus_src_apll", "apll", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(1), 1, GFLAGS),
467 GATE(0, "apll_ddr", "apll", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(0), 8, GFLAGS),
H A Dclk-rk3228.c25 apll, enumerator
162 [apll] =
163 PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), RK2928_MODE_CON, 0, 7, 0, rk3228_pll_rates),
203 GATE(0, "apll_ddr", "apll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
212 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
H A Dclk-rk3308.c27 apll, enumerator
158 [apll] =
159 PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, 0, RK3308_PLL_CON(0), RK3308_MODE_CON, 0, 0, 0, rk3308_pll_rates),
252 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(0), 0, GFLAGS),
H A Dclk-rk3288.c30 apll, enumerator
175 [apll] =
176 PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK3288_PLL_CON(0), RK3288_MODE_CON, 0, 6, 0, rk3288_pll_rates),
227 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(0), 1, GFLAGS),
H A Dclk-px30.c21 apll, enumerator
156 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, 0, PX30_PLL_CON(0), PX30_MODE_CON, 0, 0, 0, px30_pll_rates),
227 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 0, GFLAGS),
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c24 apll, enumerator
126 PNAME(mux_gpll_cpll_apll_p) = {"gpll", "cpll", "apll"};
177 [apll] =
178 PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK1808_PLL_CON(0), RK1808_MODE_CON, 0, 0, 0, rk1808_pll_rates),
253 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED, RK1808_CLKGATE_CON(0), 0, GFLAGS),
/device/soc/rockchip/rk3566/vendor/drivers/clk/
H A Dclk-rk3568.c32 apll, enumerator
224 PNAME(apll_gpll_npll_p) = {"apll", "gpll", "npll"};
306 [apll] =
307 PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, 0, RK3568_PLL_CON(0), RK3568_MODE_CON0, 0, 0, 0, rk3568_pll_rates),

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