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Searched refs:WORD_WIDTH (Results 1 - 20 of 20) sorted by relevance

/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/extend/
H A Dext_sm4.c28 static const hi_u32 g_fk[SM4_BLOCK_SIZE / WORD_WIDTH] = {
81 hi_u8 c[WORD_WIDTH];
99 hi_u8 sbox_tmp[WORD_WIDTH] = {0}; in mix_r()
103 for (j = 0; j < WORD_WIDTH; j++) { in mix_r()
134 hi_u32 k_temp[SM4_KEY_SIZE / WORD_WIDTH] = {0}; in sm4_set_encrypt_key()
143 k_temp[WORD_IDX_1] = getu32(user_key + WORD_IDX_1 * WORD_WIDTH); in sm4_set_encrypt_key()
144 k_temp[WORD_IDX_2] = getu32(user_key + WORD_IDX_2 * WORD_WIDTH); in sm4_set_encrypt_key()
145 k_temp[WORD_IDX_3] = getu32(user_key + WORD_IDX_3 * WORD_WIDTH); in sm4_set_encrypt_key()
147 for (i = 0; i < SM4_KEY_SIZE / WORD_WIDTH; i++) { in sm4_set_encrypt_key()
174 s[WORD_IDX_0] = getu32(in + WORD_IDX_0 * WORD_WIDTH); in sm4_encrypt()
[all...]
H A Dext_sm3.c47 #define SM3_W_SIZE ((SM3_BLOCK_SIZE) + (WORD_WIDTH))
48 #define SM3_RESULT_SIZE_IN_WORD ((SM3_RESULT_SIZE) / (WORD_WIDTH))
110 for (j = 0; j < SM3_BLOCK_SIZE / WORD_WIDTH; j++) { in sm3_compress()
113 for (j = SM3_BLOCK_SIZE / WORD_WIDTH; j < SM3_W_SIZE; j++) { in sm3_compress()
122 for (j = 0; j < SM3_BLOCK_SIZE / WORD_WIDTH; j++) { in sm3_compress()
138 for (j = SM3_BLOCK_SIZE / WORD_WIDTH; j < SM3_BLOCK_SIZE; j++) { in sm3_compress()
H A Dext_aead.c31 hi_u32 key[SYMC_KEY_SIZE / WORD_WIDTH]; /* SYMC even round keys, default */
32 hi_u32 iv[AES_IV_SIZE / WORD_WIDTH]; /* symc IV */
33 hi_u32 tag[AEAD_TAG_SIZE / WORD_WIDTH]; /* aead tag */
H A Dext_symc.c30 hi_u32 key[SYMC_KEY_SIZE / WORD_WIDTH]; /* symc even round keys, default */
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/compat/
H A Ddrv_klad.c83 (hi_void)hal_cipher_write_reg(KLAD_REG_DAT_IN + i * WORD_WIDTH, data_in[i]); in hal_cipher_set_klad_data()
93 (hi_void)hal_cipher_read_reg(KLAD_REG_ENC_OUT + i * WORD_WIDTH, &data_out[i]); in hal_cipher_get_klad_data()
200 hi_u32 key[AES_BLOCK_SIZE / WORD_WIDTH] = {0}; in drv_cipher_klad_load_key()
220 hal_cipher_set_klad_data(key, sizeof(key) / WORD_WIDTH); in drv_cipher_klad_load_key()
257 hal_cipher_set_klad_data((hi_u32 *)clean_key, key_len / WORD_WIDTH); in drv_cipher_klad_encrypt_key()
264 hal_cipher_get_klad_data((hi_u32 *)encrypt_key, key_len / WORD_WIDTH); in drv_cipher_klad_encrypt_key()
H A Ddrv_klad.h39 #define klad_data_in(id) (0x10 + (id) * WORD_WIDTH)
40 #define klad_data_out(id) (0x20 + (id) * WORD_WIDTH)
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/core/
H A Ddrv_ifep_rsa_v100.c86 for (i = 0; i < BLOCK_BYTES / WORD_WIDTH; i++) { in drv_rsa_crc16_block()
87 for (j = 0; j < WORD_WIDTH; j++) { in drv_rsa_crc16_block()
88 val = block[i * WORD_WIDTH + WORD_IDX_3 - j] ^ rand_num[i * WORD_WIDTH + WORD_IDX_3 - j]; in drv_rsa_crc16_block()
345 for (i = 0; i < klen; i += WORD_WIDTH) { in drv_rsa_set_key()
347 if (memcpy_s(&val, sizeof(hi_u32), n + i, WORD_WIDTH) != EOK) { in drv_rsa_set_key()
366 for (i = 0; i < klen; i += WORD_WIDTH) { in drv_rsa_set_key()
367 if (memcpy_s(&val, sizeof(hi_u32), d + i, WORD_WIDTH) != EOK) { in drv_rsa_set_key()
386 for (i = 0; i < klen; i += WORD_WIDTH) { in drv_rsa_set_input()
387 if (memcpy_s(&val, sizeof(hi_u32), in + i, WORD_WIDTH) ! in drv_rsa_set_input()
[all...]
H A Ddrv_hash_v100.c178 hash_write(REG_INIT1_UPDATE + i * WORD_WIDTH, crypto_cpu_to_be32(state[i])); in drv_hash_cfg_initial_value()
301 state[i] = hash_read(REG_SHA_OUT1 + i * WORD_WIDTH); in drv_hash_wait_done()
H A Ddrv_symc_v200.c51 hi_u32 iv[AES_IV_SIZE / WORD_WIDTH]; /* symc IV */
1057 iv[i] = symc_read(chann_cipher_ivout(chn_num) + i * WORD_WIDTH); in drv_symc_get_iv()
1070 if (key_len < SYMC_KEY_MAX_SIZE_IN_WORD * WORD_WIDTH) { in drv_symc_set_key()
1077 symc_write(cipher_key(chn_num) + i * WORD_WIDTH, key[i]); in drv_symc_set_key()
1088 if (key_len < SYMC_SM1_SK_SIZE_IN_WORD * WORD_WIDTH) { in drv_symc_set_sm1_sk()
1093 symc_write(sm1_sk(chn_num) + i * WORD_WIDTH, key[i]); in drv_symc_set_sm1_sk()
1494 hi_log_chk_param_return((pack->len[i] % (AES_BLOCK_SIZE * WORD_WIDTH)) != 0); in drv_symc_node_check()
1888 for (j = 0; j < WORD_WIDTH; j++) { in drv_symc_proc_status()
1889 val = symc_read(chann_cipher_ivout(i) + j * WORD_WIDTH); in drv_symc_proc_status()
H A Ddrv_symc_v100.c1047 iv[i] = symc_read(reg_chan_cipher_ivout(chn_num) + i * WORD_WIDTH); in drv_symc_get_iv()
1059 if (key_len < SYMC_KEY_MAX_SIZE_IN_WORD * WORD_WIDTH) { in drv_symc_set_key()
1069 symc_write(reg_cipher_key(chn_num) + i * WORD_WIDTH, key[i]); in drv_symc_set_key()
1663 for (j = 0; j < WORD_WIDTH; j++) { in drv_symc_proc_status()
1664 val = symc_read(reg_chan_cipher_ivout(i) + j * WORD_WIDTH); in drv_symc_proc_status()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/core/include/
H A Ddrv_symc.h228 hi_u32 even_key[SYMC_KEY_SIZE / WORD_WIDTH]; /* SYMC even round keys, default */
229 hi_u32 odd_key[SYMC_KEY_SIZE / WORD_WIDTH]; /* SYMC odd round keys, default */
230 hi_u32 sk[SYMC_SM1_SK_SIZE / WORD_WIDTH]; /* sm1 sk */
231 hi_u32 iv[AES_IV_SIZE / WORD_WIDTH]; /* symc IV */
232 hi_u32 tag[AEAD_TAG_SIZE / WORD_WIDTH]; /* aead tag */
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/common/
H A Defuse_opt.c36 *(volatile hi_u32 *)(data + WORD_WIDTH) &= ((1 << (size - SIZE_32_BITS)) - 1); in efuse_read()
56 tmp_data = (unsigned char *)tmp_data + WORD_WIDTH; in efuse_read()
61 start_bit += line_cnt * WORD_WIDTH * BITS_PER_BYTE; in efuse_read()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/crypto/
H A Dcryp_trng.c48 for (i = 0; i < WORD_WIDTH; i++) { in cryp_trng_check()
106 get_random_bytes((hi_u8 *)randnum, WORD_WIDTH); in cryp_trng_get_random()
H A Dcryp_rsa.c280 for (i = 0; i < (hi_u32)size; i += WORD_WIDTH) { in mbedtls_get_random()
287 left_size = (size - i) > WORD_WIDTH ? WORD_WIDTH : (size - i); in mbedtls_get_random()
351 crypto_chk_err_goto(mbedtls_mpi_read_binary(&rsa->E, (hi_u8 *)&key->e, WORD_WIDTH)); in cryp_rsa_init_key()
H A Dcryp_hash.c447 tail_size += pad_len - WORD_WIDTH * MUL_VAL_2; /* Two word length left. */ in cryp_hash_pading()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/osal/include/
H A Ddrv_cipher_define.h70 #define WORD_WIDTH 4 macro
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/commonboot/
H A Dhi_types.h128 #define WORD_WIDTH 4 macro
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/cipher/
H A Ddrv_osal_lib.h109 #define WORD_WIDTH 4 macro
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/hcc/
H A Dhcc_host.h56 #define WORD_WIDTH 4 macro
H A Dhcc_host.c1470 for (i = 0; i < length / WORD_WIDTH; i++) {

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