UART_RSA_BASE (reference) in projects: device - OpenGrok search results

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Searched refs:UART_RSA_BASE (Results 1 - 2 of 2) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/uapi/linux/
H A D	serial_reg.h	290 #define UART_RSA_BASE (-8) macro 292 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register / 299 #define UART_RSA_IER ((UART_RSA_BASE) + 1) / I/O: Interrupt Enable Register / 307 #define UART_RSA_SRR ((UART_RSA_BASE) + 2) / IN: Status Read Register / 318 #define UART_RSA_FRR ((UART_RSA_BASE) + 2) / OUT: FIFO Reset Register / 320 #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) / I/O: Timer Interval Value Set Register / 322 #define UART_RSA_TCR ((UART_RSA_BASE) + 4) / OUT: Timer Control Register */
/device/soc/rockchip/common/sdk_linux/drivers/tty/serial/8250/
H A D	8250_core.c	`366 unsigned long start = UART_RSA_BASE << up->port.regshift; in serial8250_request_rsa_resource() 390 unsigned long offset = UART_RSA_BASE << up->port.regshift; in serial8250_release_rsa_resource()`

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