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Help
Searched
refs:UART_MIS
(Results
1 - 10
of
10
) sorted by relevance
/device/qemu/arm_virt/liteos_a_mini/board/amba_pl011/
H
A
D
amba_pl011.h
54
#define
UART_MIS
0x40 /* mask interrupt state register */
macro
/device/qemu/arm_virt/liteos_a/board/amba_pl011/
H
A
D
amba_pl011.h
54
#define
UART_MIS
0x40 /* mask interrupt state register */
macro
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/fixed/include/
H
A
D
serial_dw.h
33
#define
UART_MIS
0x40
macro
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/uart/
H
A
D
serial_dw.h
84
#define
UART_MIS
0x40
macro
H
A
D
uart_drv.c
513
status = hi_reg_read_val32(udd->phys_base +
UART_MIS
);
in uart_drv_irq()
/device/soc/hisilicon/common/platform/uart/
H
A
D
uart_pl011.h
47
#define
UART_MIS
0x40 /* mask interrupt state register */
macro
H
A
D
uart_pl011.c
45
status = OSAL_READW(port->physBase +
UART_MIS
);
in Pl011Irq()
H
A
D
uart_hi35xx.c
48
{"
UART_MIS
", PLATFORM_DUMPER_REGISTERL, (void *)(port->physBase +
UART_MIS
)},
in UartDumperDump()
/device/qemu/drivers/uart/
H
A
D
uart_pl011.h
47
#define
UART_MIS
0x40 /* mask interrupt state register */
macro
H
A
D
uart_pl011.c
46
status = OSAL_READW(port->physBase +
UART_MIS
);
in Pl011Irq()
Completed in 6 milliseconds