Searched refs:UART_LCR_H (Results 1 - 10 of 10) sorted by relevance
/device/soc/hisilicon/common/platform/uart/ |
H A D | uart_pl011.c | 168 OSAL_WRITEB(lcrh, port->physBase + UART_LCR_H); in Pl011ConfigLCRH() 185 lcrh = OSAL_READW(port->physBase + UART_LCR_H); in Pl011ConfigIn() 200 OSAL_WRITEB(lcrh, port->physBase + UART_LCR_H); in Pl011ConfigIn() 290 reg_tmp = OSAL_READW(port->physBase + UART_LCR_H); in Pl011ShutDown() 293 OSAL_WRITEW(reg_tmp, port->physBase + UART_LCR_H); in Pl011ShutDown()
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H A D | uart_pl011.h | 43 #define UART_LCR_H 0x2C macro
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H A D | uart_hi35xx.c | 43 {"UART_LCR_H", PLATFORM_DUMPER_REGISTERL, (void *)(port->physBase + UART_LCR_H)}, in UartDumperDump()
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/device/qemu/drivers/uart/ |
H A D | uart_pl011.c | 169 OSAL_WRITEB(lcrh, port->physBase + UART_LCR_H); in Pl011ConfigLCRH() 186 lcrh = OSAL_READW(port->physBase + UART_LCR_H); in Pl011ConfigIn() 201 OSAL_WRITEB(lcrh, port->physBase + UART_LCR_H); in Pl011ConfigIn() 291 reg_tmp = OSAL_READW(port->physBase + UART_LCR_H); in Pl011ShutDown() 294 OSAL_WRITEW(reg_tmp, port->physBase + UART_LCR_H); in Pl011ShutDown()
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H A D | uart_pl011.h | 43 #define UART_LCR_H 0x2C macro
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/device/qemu/arm_virt/liteos_a_mini/board/amba_pl011/ |
H A D | amba_pl011.h | 50 #define UART_LCR_H 0x2C
macro
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/device/qemu/arm_virt/liteos_a/board/amba_pl011/ |
H A D | amba_pl011.h | 50 #define UART_LCR_H 0x2C
macro
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/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/uart/ |
H A D | hi_uart.c | 39 #define UART_LCR_H 0x2C macro 452 g_uart_regs_save[port_num].lcr_h = hi_reg_read_val16(udd->phys_base + UART_LCR_H); in hi_uart_lp_save() 476 hi_reg_write16((phys_base + UART_LCR_H), 0); in hi_uart_lp_restore() 481 hi_reg_write16((phys_base + UART_LCR_H), g_uart_regs_save[port_num].lcr_h); in hi_uart_lp_restore()
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H A D | serial_dw.h | 79 #define UART_LCR_H 0x2C macro
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/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/fixed/include/ |
H A D | serial_dw.h | 28 #define UART_LCR_H 0x2C macro
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