Searched refs:UART_LCR (Results 1 - 7 of 7) sorted by relevance
| /device/soc/rockchip/common/sdk_linux/drivers/tty/serial/8250/ |
| H A D | 8250_port.c | 363 5, /* UART_LCR */
374 5, /* UART_LCR */
555 p->serial_in(p, UART_LCR); /* safe, no side-effects */
in serial_port_out_sync()
772 lcr = serial_in(p, UART_LCR);
in serial8250_set_sleep()
774 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
in serial8250_set_sleep()
776 serial_out(p, UART_LCR, 0);
in serial8250_set_sleep()
780 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
in serial8250_set_sleep()
782 serial_out(p, UART_LCR, lcr);
in serial8250_set_sleep()
870 old_lcr = serial_in(up, UART_LCR);
in size_fifo()
871 serial_out(up, UART_LCR, in size_fifo()
[all...] |
| H A D | 8250_dw.c | 100 void __iomem *offset = p->membase + (UART_LCR << p->regshift);
in dw8250_check_lcr()
105 unsigned int lcr = p->serial_in(p, UART_LCR);
in dw8250_check_lcr()
161 if (offset == UART_LCR) {
in dw8250_serial_out38x()
167 if (offset == UART_LCR && !d->uart_16550_compatible) {
in dw8250_serial_out38x()
178 if (offset == UART_LCR && !d->uart_16550_compatible) {
in dw8250_serial_out()
207 __raw_readq(p->membase + (UART_LCR << p->regshift));
in dw8250_serial_outq()
209 if (offset == UART_LCR && !d->uart_16550_compatible) {
in dw8250_serial_outq()
221 if (offset == UART_LCR && !d->uart_16550_compatible) {
in dw8250_serial_out32()
239 if (offset == UART_LCR && !d->uart_16550_compatible) {
in dw8250_serial_out32be()
|
| H A D | 8250_core.c | 827 serial_port_out(port, UART_LCR, 0xE0); in serial8250_resume_port()
831 serial_port_out(port, UART_LCR, 0); in serial8250_resume_port()
|
| /device/soc/rockchip/common/sdk_linux/include/uapi/linux/ |
| H A D | serial_reg.h | 100 #define UART_LCR 3 /* Out: Line Control Register */ macro
|
| /device/soc/rockchip/common/vendor/drivers/rockchip/ |
| H A D | rk_fiq_debugger.c | 125 rk_fiq_write(t, 0x83, UART_LCR);
in debug_port_init()
129 rk_fiq_write(t, 0x03, UART_LCR);
in debug_port_init()
|
| /device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/ |
| H A D | rk_fiq_debugger.c | 125 rk_fiq_write(t, 0x83, UART_LCR); in debug_port_init()
129 rk_fiq_write(t, 0x03, UART_LCR); in debug_port_init()
|
| /device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/ |
| H A D | sbchipc.h | 1472 #define UART_LCR 3 /**< Out: Line Control Register */ macro
|
Completed in 24 milliseconds