Home
last modified time | relevance | path

Searched refs:TCLK_ZERO (Results 1 - 3 of 3) sorted by relevance

/device/soc/hisilicon/common/platform/mipi_dsi/
H A Dmipi_tx_hi35xx.h33 #define TCLK_ZERO 250 macro
H A Dmipi_tx_hi35xx.c269 if ((g_actualPhyDataRate * TCLK_ZERO + ROUNDUP_VALUE) / INNER_PEROID > 4) { /* 4 is compensate */ in MipiTxDrvGetPhyTimingParam()
270 tp->clkTclkZero = (g_actualPhyDataRate * TCLK_ZERO + ROUNDUP_VALUE) / INNER_PEROID - 4; in MipiTxDrvGetPhyTimingParam()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_tx/
H A Dmipi_tx_hal.c42 #define TCLK_ZERO 250 macro
333 if ((g_actual_phy_data_rate * TCLK_ZERO + ROUNDUP_VALUE) / INNER_PEROID > 4) { /* 4 is compensate */ in mipi_tx_drv_get_phy_timing_parameters()
334 tp->clk_tclk_zero = (g_actual_phy_data_rate * TCLK_ZERO + ROUNDUP_VALUE) / INNER_PEROID - 4; in mipi_tx_drv_get_phy_timing_parameters()

Completed in 5 milliseconds