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Searched refs:SMP_PHASE_0 (Results 1 - 2 of 2) sorted by relevance

/device/soc/hisilicon/common/platform/mmc/himci_v200/
H A Dhimci.h388 #define SMP_PHASE_0 (0x0 << 16) macro
396 #define SMPL_PHASE_DFLT SMP_PHASE_0
H A Dhimci.c987 phase = DRV_PHASE_135 | SMP_PHASE_0; in HimciCfgPhase()
991 phase = DRV_PHASE_180 | SMP_PHASE_0; in HimciCfgPhase()
995 phase = DRV_PHASE_135 | SMP_PHASE_0; in HimciCfgPhase()
997 phase = DRV_PHASE_90 | SMP_PHASE_0; in HimciCfgPhase()
1003 phase = DRV_PHASE_180 | SMP_PHASE_0; in HimciCfgPhase()

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