Searched refs:SCLK_TIMER5 (Results 1 - 14 of 14) sorted by relevance
| /device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 36 #define SCLK_TIMER5 90 macro
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| H A D | rk3188-cru-common.h | 45 #define SCLK_TIMER5 89 macro
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| H A D | rk1808-cru.h | 93 #define SCLK_TIMER5 92 macro
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| H A D | px30-cru.h | 45 #define SCLK_TIMER5 43 macro
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| H A D | rk3288-cru.h | 45 #define SCLK_TIMER5 90 macro
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| /device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/ |
| H A D | rk1808-cru.h | 93 #define SCLK_TIMER5 92 macro
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| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-rk3128.c | 261 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(10), 8, GFLAGS),
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| H A D | clk-rk3188.c | 585 GATE(SCLK_TIMER5, "timer5", "xin24m", 0, RK2928_CLKGATE_CON(3), 8, GFLAGS),
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| H A D | clk-rk3328.c | 357 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", 0, RK3328_CLKGATE_CON(8), 10, GFLAGS),
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| H A D | clk-rk3228.c | 297 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", 0, RK2928_CLKGATE_CON(6), 10, GFLAGS),
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| H A D | clk-rk3308.c | 336 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", 0, RK3308_CLKGATE_CON(3), 15, GFLAGS),
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| H A D | clk-rk3288.c | 301 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", 0, RK3288_CLKGATE_CON(1), 5, GFLAGS),
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| H A D | clk-px30.c | 536 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", 0, PX30_CLKGATE_CON(13), 5, GFLAGS),
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| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-rk1808.c | 699 GATE(SCLK_TIMER5, "sclk_timer5", "xin24m", 0, RK1808_CLKGATE_CON(14), 13, GFLAGS),
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Completed in 18 milliseconds