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Searched refs:SCLK_TIMER2 (Results 1 - 16 of 16) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A Drk3036-cru.h30 #define SCLK_TIMER2 87 macro
H A Drk3128-cru.h33 #define SCLK_TIMER2 87 macro
H A Drk3188-cru-common.h42 #define SCLK_TIMER2 86 macro
H A Drk1808-cru.h90 #define SCLK_TIMER2 89 macro
H A Dpx30-cru.h42 #define SCLK_TIMER2 40 macro
H A Drk3288-cru.h42 #define SCLK_TIMER2 87 macro
/device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/
H A Drk1808-cru.h90 #define SCLK_TIMER2 89 macro
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3188.c511 GATE(SCLK_TIMER2, "timer2", "xin24m", 0, RK2928_CLKGATE_CON(3), 2, GFLAGS),
582 GATE(SCLK_TIMER2, "timer2", "xin24m", 0, RK2928_CLKGATE_CON(3), 4, GFLAGS),
H A Dclk-rk3036.c216 COMPOSITE_NODIV(SCLK_TIMER2, "sclk_timer2", mux_timer_p, CLK_IGNORE_UNUSED, RK2928_CLKSEL_CON(2), 6, 1, MFLAGS,
H A Dclk-rk3128.c258 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, RK2928_CLKGATE_CON(10), 5, GFLAGS),
H A Dclk-rk3328.c354 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, RK3328_CLKGATE_CON(8), 7, GFLAGS),
H A Dclk-rk3228.c294 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, RK2928_CLKGATE_CON(6), 7, GFLAGS),
H A Dclk-rk3308.c333 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, RK3308_CLKGATE_CON(3), 12, GFLAGS),
H A Dclk-rk3288.c298 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, RK3288_CLKGATE_CON(1), 2, GFLAGS),
H A Dclk-px30.c533 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, PX30_CLKGATE_CON(13), 2, GFLAGS),
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c696 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0, RK1808_CLKGATE_CON(14), 10, GFLAGS),

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