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Searched refs:SCLK_TIMER1 (Results 1 - 17 of 17) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A Drk3036-cru.h29 #define SCLK_TIMER1 86 macro
H A Drk3128-cru.h32 #define SCLK_TIMER1 86 macro
H A Drk3188-cru-common.h41 #define SCLK_TIMER1 85 macro
H A Drk1808-cru.h89 #define SCLK_TIMER1 88 macro
H A Dpx30-cru.h41 #define SCLK_TIMER1 39 macro
H A Drk3288-cru.h41 #define SCLK_TIMER1 86 macro
/device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/
H A Drk1808-cru.h89 #define SCLK_TIMER1 88 macro
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3036.c214 COMPOSITE_NODIV(SCLK_TIMER1, "sclk_timer1", mux_timer_p, CLK_IGNORE_UNUSED, RK2928_CLKSEL_CON(2), 5, 1, MFLAGS,
H A Dclk-rk3128.c257 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, RK2928_CLKGATE_CON(10), 4, GFLAGS),
H A Dclk-rk3188.c370 GATE(SCLK_TIMER1, "timer1", "xin24m", 0, RK2928_CLKGATE_CON(1), 1, GFLAGS),
H A Dclk-rk3328.c353 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, RK3328_CLKGATE_CON(8), 6, GFLAGS),
H A Dclk-rv1108.c402 GATE(SCLK_TIMER1, "clk_timer1", "xin24m", CLK_IGNORE_UNUSED, RV1108_CLKGATE_CON(1), 10, GFLAGS),
H A Dclk-rk3228.c293 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, RK2928_CLKGATE_CON(6), 6, GFLAGS),
H A Dclk-rk3308.c332 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, RK3308_CLKGATE_CON(3), 11, GFLAGS),
H A Dclk-rk3288.c297 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, RK3288_CLKGATE_CON(1), 1, GFLAGS),
H A Dclk-px30.c532 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, PX30_CLKGATE_CON(13), 1, GFLAGS),
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c695 GATE(SCLK_TIMER1, "sclk_timer1", "xin24m", 0, RK1808_CLKGATE_CON(14), 9, GFLAGS),

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