Searched refs:SCLK_PDM (Results 1 - 7 of 7) sorted by relevance
| /device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/ |
| H A D | rk1808-cru.h | 94 #define SCLK_PDM 93 macro
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| H A D | px30-cru.h | 17 #define SCLK_PDM 15 macro
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| /device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/ |
| H A D | rk1808-cru.h | 94 #define SCLK_PDM 93 macro
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| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-rk3328.c | 349 COMPOSITE(SCLK_PDM, "clk_pdm", mux_cpll_gpll_apll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
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| H A D | clk-rk3308.c | 485 GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", 0, RK3308_CLKGATE_CON(10), 5, GFLAGS),
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| H A D | clk-px30.c | 429 GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", CLK_SET_RATE_PARENT, PX30_CLKGATE_CON(9), 11, GFLAGS),
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| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-rk1808.c | 717 GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", 0, RK1808_CLKGATE_CON(17), 11, GFLAGS),
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