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Help
Searched
refs:SC0_BASE
(Results
1 - 2
of
2
) sorted by relevance
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H
A
D
mali_kbase_vinstr.c
679
SC0_BASE
= 0 * NR_CNT_PER_BLOCK * NR_BYTES_PER_CNT,
in patch_dump_buffer_hdr_v4()
enumerator
692
memcpy(&dst[group +
SC0_BASE
], &src[group +
SC0_BASE
], NR_BYTES_PER_HDR);
in patch_dump_buffer_hdr_v4()
707
mask = (u32 *)&dst[group +
SC0_BASE
+ PRFCNT_EN_MASK_OFFSET];
in patch_dump_buffer_hdr_v4()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H
A
D
mali_kbase_vinstr.c
723
SC0_BASE
= 0 * NR_CNT_PER_BLOCK * NR_BYTES_PER_CNT,
in patch_dump_buffer_hdr_v4()
enumerator
738
memcpy(&dst[group +
SC0_BASE
], &src[group +
SC0_BASE
],
in patch_dump_buffer_hdr_v4()
760
mask = (u32 *)&dst[group +
SC0_BASE
+ PRFCNT_EN_MASK_OFFSET];
in patch_dump_buffer_hdr_v4()
Completed in 6 milliseconds