Searched refs:RK_MMU_DTE_ADDR (Results 1 - 3 of 3) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/video/rockchip/mpp/hack/ |
| H A D | mpp_hack_px30.c | 23 #define RK_MMU_DTE_ADDR 0x00 /* Directory table address */
macro
57 return readl(iommu->bases[0] + RK_MMU_DTE_ADDR);
in mpp_iommu_get_dte_addr()
82 writel(iommu->dte_addr, iommu->bases[i] + RK_MMU_DTE_ADDR);
in mpp_iommu_enable()
114 dte = readl(iommu->bases[0] + RK_MMU_DTE_ADDR);
in mpp_iommu_disable()
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| /device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/mpp/hack/ |
| H A D | mpp_hack_px30.c | 23 #define RK_MMU_DTE_ADDR 0x00 /* Directory table address */ macro
59 return readl(iommu->bases[0] + RK_MMU_DTE_ADDR); in mpp_iommu_get_dte_addr()
85 iommu->bases[i] + RK_MMU_DTE_ADDR); in mpp_iommu_enable()
122 dte = readl(iommu->bases[0] + RK_MMU_DTE_ADDR); in mpp_iommu_disable()
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| /device/soc/rockchip/common/sdk_linux/drivers/iommu/ |
| H A D | rockchip-iommu.c | 35 #define RK_MMU_DTE_ADDR 0x00 /* Directory table address */
macro
451 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0;
in rk_iommu_is_reset_done()
635 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, DTE_ADDR_DUMMY);
in rk_iommu_force_reset()
642 dte_addr = rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR);
in rk_iommu_force_reset()
683 mmu_dte_addr = rk_iommu_read(base, RK_MMU_DTE_ADDR);
in log_iova()
1293 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, 0);
in rk_iommu_disable()
1341 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, dt_v2);
in rk_iommu_enable()
1343 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, rk_domain->dt_dma);
in rk_iommu_enable()
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