PRFCNT_EN_MASK_OFFSET (reference) in projects: device - OpenGrok search results

Repository(s)

Full Search		Search through all text tokens(words,strings,identifiers,numbers) in index.
Definition		Only finds symbol definitions(where e.g a variable(function,...) is defined).
Symbol		Only finds symbol(e.g. methods classes,function,variables).
File Path		Path of the source file(use "/").If you want just exact path,enclose it in "".Source files end with: .jar/.bz2/.a/.h/.java...
History		History log comments.
Type		Type of analyzer used to filter file types include with selected(e.g. just C sources).

Help

Searched refs:PRFCNT_EN_MASK_OFFSET (Results 1 - 2 of 2) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A D	mali_kbase_vinstr.c	55 #define PRFCNT_EN_MASK_OFFSET 0x8 macro 707 mask = (u32 )&dst[group + SC0_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 709 mask = (u32 )&dst[group + SC1_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 711 mask = (u32 )&dst[group + SC2_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 713 mask = (u32 )&dst[group + SC3_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 717 mask = (u32 )&dst[group + TILER_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 721 mask = (u32 )&dst[group + MMU_L2_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 725 mask = (u32 )&dst[group + JM_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 746 mask = (u32 )&dst[PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v5() 753 mask = (u32 *)&dst[PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v5() [all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A D	mali_kbase_vinstr.c	56 #define PRFCNT_EN_MASK_OFFSET 0x8 macro 760 mask = (u32 )&dst[group + SC0_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 762 mask = (u32 )&dst[group + SC1_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 764 mask = (u32 )&dst[group + SC2_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 766 mask = (u32 )&dst[group + SC3_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 770 mask = (u32 )&dst[group + TILER_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 774 mask = (u32 )&dst[group + MMU_L2_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 778 mask = (u32 )&dst[group + JM_BASE + PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v4() 801 mask = (u32 )&dst[PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v5() 808 mask = (u32 *)&dst[PRFCNT_EN_MASK_OFFSET]; in patch_dump_buffer_hdr_v5() [all...]

Completed in 4 milliseconds