Home
last modified time | relevance | path

Searched refs:PMU_CMU_CTL_CMU_CLK_SEL_REG (Results 1 - 4 of 4) sorted by relevance

/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/drivers/flash/
H A Dhi_flashboot_flash.c90 hi_reg_read16(PMU_CMU_CTL_CMU_CLK_SEL_REG, reg_val); in sfc_config_update_freq()
95 hi_reg_write16(PMU_CMU_CTL_CMU_CLK_SEL_REG, reg_val); /* Configuring Driver Capabilities */ in sfc_config_update_freq()
111 hi_reg_write16(PMU_CMU_CTL_CMU_CLK_SEL_REG, reg_val); in sfc_config_update_freq()
117 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8, 2); /* 8, 2 96M */ in sfc_config_cmu_clk_sel()
119 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8, 2); /* set 8 left shift 2 */ in sfc_config_cmu_clk_sel()
120 hi_reg_setbit(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8); /* 80M */ in sfc_config_cmu_clk_sel()
122 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8, 2); /* set 8 left shift 2 */ in sfc_config_cmu_clk_sel()
123 hi_reg_setbit(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8); /* 48M */ in sfc_config_cmu_clk_sel()
124 hi_reg_setbit(PMU_CMU_CTL_CMU_CLK_SEL_REG, 9); /* 9 */ in sfc_config_cmu_clk_sel()
271 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, in flash_clk_config()
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/drivers/flash/
H A Dhi_loaderboot_flash.c90 hi_reg_read16(PMU_CMU_CTL_CMU_CLK_SEL_REG, reg_val); in sfc_config_update_freq()
95 hi_reg_write16(PMU_CMU_CTL_CMU_CLK_SEL_REG, reg_val); in sfc_config_update_freq()
112 hi_reg_write16(PMU_CMU_CTL_CMU_CLK_SEL_REG, reg_val); in sfc_config_update_freq()
118 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8, 2); /* 8, 2 96M */ in sfc_config_cmu_clk_sel()
120 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8, 2); /* set 8 left shift 2 */ in sfc_config_cmu_clk_sel()
121 hi_reg_setbit(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8); /* 80M */ in sfc_config_cmu_clk_sel()
123 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8, 2); /* set 8 left shift 2 */ in sfc_config_cmu_clk_sel()
124 hi_reg_setbit(PMU_CMU_CTL_CMU_CLK_SEL_REG, 8); /* 48M */ in sfc_config_cmu_clk_sel()
125 hi_reg_setbit(PMU_CMU_CTL_CMU_CLK_SEL_REG, 9); /* 9 */ in sfc_config_cmu_clk_sel()
219 hi_reg_clrbits(PMU_CMU_CTL_CMU_CLK_SEL_REG, in flash_clk_config()
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/commonboot/
H A Dhi3861_platform.h115 #define PMU_CMU_CTL_CMU_CLK_SEL_REG (PMU_CMU_CTL_BASE + 0x518) macro
/device/soc/hisilicon/hi3861v100/sdk_liteos/include/
H A Dhi3861_platform_base.h314 #define PMU_CMU_CTL_CMU_CLK_SEL_REG (PMU_CMU_CTL_BASE + 0x518) macro

Completed in 4 milliseconds