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Searched refs:PLL_SET0 (Results 1 - 3 of 3) sorted by relevance

/device/soc/hisilicon/common/platform/mipi_dsi/
H A Dmipi_tx_hi35xx.h41 #define PLL_SET0 0x60 macro
H A Dmipi_tx_hi35xx.c159 SetPhyReg(PLL_SET0, pllSet0); in MipiTxDrvSetPhyPllSetX()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_tx/
H A Dmipi_tx_hal.c50 #define PLL_SET0 0x60 macro
218 set_phy_reg(PLL_SET0, pll_set0); in mipi_tx_drv_set_phy_pll_setx()

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