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Searched refs:MPP_FRAME_FBC_AFBC_V1 (Results 1 - 5 of 5) sorted by relevance

/device/soc/rockchip/rk3399/hardware/mpp/include/
H A Dmpp_frame.h180 #define MPP_FRAME_FBC_AFBC_V1 (0x00100000) macro
196 * For MPP_FRAME_FBC_AFBC_V1 the 16byte aligned stride is used.
/device/soc/rockchip/rk3568/hardware/mpp/include/
H A Dmpp_frame.h180 #define MPP_FRAME_FBC_AFBC_V1 (0x00100000) macro
196 * For MPP_FRAME_FBC_AFBC_V1 the 16byte aligned stride is used.
/device/soc/rockchip/rk3588/hardware/mpp/include/
H A Dmpp_frame.h179 #define MPP_FRAME_FBC_AFBC_V1 (0x00100000) macro
195 * For MPP_FRAME_FBC_AFBC_V1 the 16byte aligned stride is used.
/device/soc/rockchip/common/hardware/mpp/include/
H A Dmpp_frame.h181 #define MPP_FRAME_FBC_AFBC_V1 (0x00100000) macro
197 * For MPP_FRAME_FBC_AFBC_V1 the 16byte aligned stride is used.
/device/soc/rockchip/rk3588/hardware/mpp/src/
H A Dmpi_enc_utils.c142 if ((p->fmt & MPP_FRAME_FBC_MASK) == MPP_FRAME_FBC_AFBC_V1) in test_ctx_init()

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