Home
last modified time | relevance | path

Searched refs:CLK_TCLK_ZERO (Results 1 - 3 of 3) sorted by relevance

/device/soc/hisilicon/common/platform/mipi_dsi/
H A Dmipi_tx_hi35xx.h57 #define CLK_TCLK_ZERO 0x12 macro
H A Dmipi_tx_hi35xx.c268 /* CLK_TCLK_ZERO */ in MipiTxDrvGetPhyTimingParam()
303 /* CLK_TCLK_ZERO */ in MipiTxDrvSetPhyTimingParam()
304 SetPhyReg(CLK_TCLK_ZERO, tp->clkTclkZero); in MipiTxDrvSetPhyTimingParam()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_tx/
H A Dmipi_tx_hal.c66 #define CLK_TCLK_ZERO 0x12 macro
332 /* CLK_TCLK_ZERO */ in mipi_tx_drv_get_phy_timing_parameters()
385 /* CLK_TCLK_ZERO */ in mipi_tx_drv_set_phy_timing_parameters()
386 set_phy_reg(CLK_TCLK_ZERO, clk_tclk_zero); in mipi_tx_drv_set_phy_timing_parameters()

Completed in 4 milliseconds