Home
last modified time | relevance | path

Searched refs:CLK_OPS_PARENT_ENABLE (Results 1 - 3 of 3) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c292 COMPOSITE_NOGATE(0, "clk_npu_div", mux_gpll_cpll_p, CLK_OPS_PARENT_ENABLE, RK1808_CLKSEL_CON(1), 8, 2, MFLAGS, 0, 4,
294 COMPOSITE_NOGATE_HALFDIV(0, "clk_npu_np5", mux_gpll_cpll_p, CLK_OPS_PARENT_ENABLE, RK1808_CLKSEL_CON(1), 10, 2,
/device/soc/rockchip/common/sdk_linux/include/linux/
H A Dclk-provider.h32 #define CLK_OPS_PARENT_ENABLE BIT(12) macro
/device/soc/rockchip/rk3566/vendor/drivers/clk/
H A Dclk-rk3568.c475 MUX(CLK_NPU_PRE_NDFT, "clk_npu_pre_ndft", clk_npu_pre_ndft_p, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,

Completed in 7 milliseconds