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Searched refs:CLK_DIVIDER_ONE_BASED (Results 1 - 2 of 2) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A Drockchip.h10 #define CLK_DIVIDER_ONE_BASED BIT(0) macro
/device/soc/rockchip/common/sdk_linux/include/linux/
H A Dclk-provider.h536 * CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the
537 * register plus one. If CLK_DIVIDER_ONE_BASED is set then the divider is
543 * CLK_DIVIDER_ONE_BASED set, it is possible to end up with a zero divisor.
555 * CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED
576 #define CLK_DIVIDER_ONE_BASED BIT(0) macro

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